forked from OSchip/llvm-project
280 lines
9.0 KiB
LLVM
280 lines
9.0 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX2
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define <16 x i8> @mul8c(<16 x i8> %i) nounwind {
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; SSE2-LABEL: mul8c:
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; SSE2: # BB#0: # %entry
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; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117]
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; SSE2-NEXT: psraw $8, %xmm1
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; SSE2-NEXT: movdqa %xmm0, %xmm2
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; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
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; SSE2-NEXT: psraw $8, %xmm2
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; SSE2-NEXT: pmullw %xmm1, %xmm2
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; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
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; SSE2-NEXT: pand %xmm3, %xmm2
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; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; SSE2-NEXT: psraw $8, %xmm0
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; SSE2-NEXT: pmullw %xmm1, %xmm0
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; SSE2-NEXT: pand %xmm3, %xmm0
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; SSE2-NEXT: packuswb %xmm2, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: mul8c:
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; SSE41: # BB#0: # %entry
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; SSE41-NEXT: pmovsxbw %xmm0, %xmm1
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; SSE41-NEXT: pmovsxbw {{.*}}(%rip), %xmm2
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; SSE41-NEXT: pmullw %xmm2, %xmm1
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; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
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; SSE41-NEXT: pand %xmm3, %xmm1
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; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; SSE41-NEXT: pmovsxbw %xmm0, %xmm0
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; SSE41-NEXT: pmullw %xmm2, %xmm0
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; SSE41-NEXT: pand %xmm3, %xmm0
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; SSE41-NEXT: packuswb %xmm0, %xmm1
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; SSE41-NEXT: movdqa %xmm1, %xmm0
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; SSE41-NEXT: retq
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entry:
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%A = mul <16 x i8> %i, < i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117 >
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ret <16 x i8> %A
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}
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define <8 x i16> @mul16c(<8 x i16> %i) nounwind {
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; ALL-LABEL: mul16c:
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; ALL: # BB#0: # %entry
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; ALL-NEXT: pmullw {{.*}}(%rip), %xmm0
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; ALL-NEXT: retq
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entry:
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%A = mul <8 x i16> %i, < i16 117, i16 117, i16 117, i16 117, i16 117, i16 117, i16 117, i16 117 >
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ret <8 x i16> %A
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}
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define <4 x i32> @a(<4 x i32> %i) nounwind {
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; SSE2-LABEL: a:
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; SSE2: # BB#0: # %entry
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; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [117,117,117,117]
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; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; SSE2-NEXT: pmuludq %xmm1, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; SSE2-NEXT: pmuludq %xmm1, %xmm2
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
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; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: a:
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; SSE41: # BB#0: # %entry
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; SSE41-NEXT: pmulld {{.*}}(%rip), %xmm0
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; SSE41-NEXT: retq
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entry:
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%A = mul <4 x i32> %i, < i32 117, i32 117, i32 117, i32 117 >
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ret <4 x i32> %A
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}
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define <2 x i64> @b(<2 x i64> %i) nounwind {
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; ALL-LABEL: b:
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; ALL: # BB#0: # %entry
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; ALL-NEXT: movdqa {{.*#+}} xmm1 = [117,117]
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; ALL-NEXT: movdqa %xmm0, %xmm2
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; ALL-NEXT: pmuludq %xmm1, %xmm2
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; ALL-NEXT: psrlq $32, %xmm0
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; ALL-NEXT: pmuludq %xmm1, %xmm0
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; ALL-NEXT: psllq $32, %xmm0
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; ALL-NEXT: paddq %xmm2, %xmm0
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; ALL-NEXT: retq
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entry:
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%A = mul <2 x i64> %i, < i64 117, i64 117 >
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ret <2 x i64> %A
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}
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define <16 x i8> @mul8(<16 x i8> %i, <16 x i8> %j) nounwind {
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; SSE2-LABEL: mul8:
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; SSE2: # BB#0: # %entry
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; SSE2-NEXT: movdqa %xmm1, %xmm2
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; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
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; SSE2-NEXT: psraw $8, %xmm2
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; SSE2-NEXT: movdqa %xmm0, %xmm3
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; SSE2-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
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; SSE2-NEXT: psraw $8, %xmm3
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; SSE2-NEXT: pmullw %xmm2, %xmm3
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; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
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; SSE2-NEXT: pand %xmm2, %xmm3
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; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; SSE2-NEXT: psraw $8, %xmm1
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; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; SSE2-NEXT: psraw $8, %xmm0
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; SSE2-NEXT: pmullw %xmm1, %xmm0
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; SSE2-NEXT: pand %xmm2, %xmm0
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; SSE2-NEXT: packuswb %xmm3, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: mul8:
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; SSE41: # BB#0: # %entry
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; SSE41-NEXT: pmovsxbw %xmm1, %xmm3
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; SSE41-NEXT: pmovsxbw %xmm0, %xmm2
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; SSE41-NEXT: pmullw %xmm3, %xmm2
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; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
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; SSE41-NEXT: pand %xmm3, %xmm2
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; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
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; SSE41-NEXT: pmovsxbw %xmm1, %xmm1
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; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; SSE41-NEXT: pmovsxbw %xmm0, %xmm0
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; SSE41-NEXT: pmullw %xmm1, %xmm0
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; SSE41-NEXT: pand %xmm3, %xmm0
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; SSE41-NEXT: packuswb %xmm0, %xmm2
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; SSE41-NEXT: movdqa %xmm2, %xmm0
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; SSE41-NEXT: retq
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entry:
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%A = mul <16 x i8> %i, %j
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ret <16 x i8> %A
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}
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define <8 x i16> @mul16(<8 x i16> %i, <8 x i16> %j) nounwind {
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; ALL-LABEL: mul16:
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; ALL: # BB#0: # %entry
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; ALL-NEXT: pmullw %xmm1, %xmm0
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; ALL-NEXT: retq
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entry:
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%A = mul <8 x i16> %i, %j
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ret <8 x i16> %A
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}
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define <4 x i32> @c(<4 x i32> %i, <4 x i32> %j) nounwind {
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; SSE2-LABEL: c:
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; SSE2: # BB#0: # %entry
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; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; SSE2-NEXT: pmuludq %xmm1, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
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; SSE2-NEXT: pmuludq %xmm2, %xmm1
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: c:
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; SSE41: # BB#0: # %entry
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; SSE41-NEXT: pmulld %xmm1, %xmm0
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; SSE41-NEXT: retq
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entry:
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%A = mul <4 x i32> %i, %j
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ret <4 x i32> %A
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}
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define <2 x i64> @d(<2 x i64> %i, <2 x i64> %j) nounwind {
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; ALL-LABEL: d:
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; ALL: # BB#0: # %entry
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; ALL-NEXT: movdqa %xmm0, %xmm2
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; ALL-NEXT: pmuludq %xmm1, %xmm2
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; ALL-NEXT: movdqa %xmm1, %xmm3
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; ALL-NEXT: psrlq $32, %xmm3
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; ALL-NEXT: pmuludq %xmm0, %xmm3
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; ALL-NEXT: psllq $32, %xmm3
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; ALL-NEXT: paddq %xmm3, %xmm2
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; ALL-NEXT: psrlq $32, %xmm0
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; ALL-NEXT: pmuludq %xmm1, %xmm0
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; ALL-NEXT: psllq $32, %xmm0
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; ALL-NEXT: paddq %xmm2, %xmm0
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; ALL-NEXT: retq
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entry:
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%A = mul <2 x i64> %i, %j
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ret <2 x i64> %A
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}
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declare void @foo()
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define <4 x i32> @e(<4 x i32> %i, <4 x i32> %j) nounwind {
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; SSE2-LABEL: e:
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; SSE2: # BB#0: # %entry
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; SSE2-NEXT: subq $40, %rsp
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; SSE2-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
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; SSE2-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; SSE2-NEXT: callq foo
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; SSE2-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; SSE2-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm2 # 16-byte Reload
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; SSE2-NEXT: pmuludq %xmm2, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
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; SSE2-NEXT: pmuludq %xmm1, %xmm2
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
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; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; SSE2-NEXT: addq $40, %rsp
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: e:
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; SSE41: # BB#0: # %entry
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; SSE41-NEXT: subq $40, %rsp
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; SSE41-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
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; SSE41-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; SSE41-NEXT: callq foo
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; SSE41-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
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; SSE41-NEXT: pmulld {{[0-9]+}}(%rsp), %xmm0 # 16-byte Folded Reload
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; SSE41-NEXT: addq $40, %rsp
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; SSE41-NEXT: retq
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entry:
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; Use a call to force spills.
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call void @foo()
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%A = mul <4 x i32> %i, %j
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ret <4 x i32> %A
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}
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define <2 x i64> @f(<2 x i64> %i, <2 x i64> %j) nounwind {
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; ALL-LABEL: f:
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; ALL: # BB#0: # %entry
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; ALL-NEXT: subq $40, %rsp
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; ALL-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
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; ALL-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; ALL-NEXT: callq foo
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; ALL-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
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; ALL-NEXT: movdqa %xmm0, %xmm2
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; ALL-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm3 # 16-byte Reload
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; ALL-NEXT: pmuludq %xmm3, %xmm2
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; ALL-NEXT: movdqa %xmm3, %xmm1
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; ALL-NEXT: psrlq $32, %xmm1
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; ALL-NEXT: pmuludq %xmm0, %xmm1
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; ALL-NEXT: psllq $32, %xmm1
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; ALL-NEXT: paddq %xmm1, %xmm2
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; ALL-NEXT: psrlq $32, %xmm0
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; ALL-NEXT: pmuludq %xmm3, %xmm0
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; ALL-NEXT: psllq $32, %xmm0
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; ALL-NEXT: paddq %xmm2, %xmm0
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; ALL-NEXT: addq $40, %rsp
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; ALL-NEXT: retq
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entry:
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; Use a call to force spills.
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call void @foo()
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%A = mul <2 x i64> %i, %j
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ret <2 x i64> %A
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}
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define <4 x i64> @b1(<4 x i64> %i) nounwind {
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; AVX2-LABEL: @b1
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; AVX2: vpbroadcastq
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; AVX2-NEXT: vpmuludq
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; AVX2-NEXT: vpsrlq $32
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; AVX2-NEXT: vpmuludq
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; AVX2-NEXT: vpsllq $32
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; AVX2-NEXT: vpaddq
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; AVX2-NEXT: retq
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entry:
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%A = mul <4 x i64> %i, < i64 117, i64 117, i64 117, i64 117 >
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ret <4 x i64> %A
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}
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define <4 x i64> @b2(<4 x i64> %i, <4 x i64> %j) nounwind {
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; AVX2-LABEL: @b2
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; AVX2: vpmuludq
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; AVX2-NEXT: vpsrlq $32
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; AVX2-NEXT: vpmuludq
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; AVX2-NEXT: vpsllq $32
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; AVX2-NEXT: vpaddq
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; AVX2-NEXT: vpsrlq $32
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; AVX2-NEXT: vpmuludq
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; AVX2-NEXT: vpsllq $32
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; AVX2-NEXT: vpaddq
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; AVX2-NEXT: retq
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entry:
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%A = mul <4 x i64> %i, %j
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ret <4 x i64> %A
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}
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