forked from OSchip/llvm-project
150 lines
6.2 KiB
LLVM
150 lines
6.2 KiB
LLVM
; RUN: llc -mtriple armv7a--none-eabi -enable-ipra=true -arm-extra-spills -arm-extra-spills-force -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple thumbv7a--none-eabi -enable-ipra=true -arm-extra-spills -arm-extra-spills-force -verify-machineinstrs < %s | FileCheck %s
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; Test the interaction between IPRA and C++ exception handling. Currently, IPRA
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; only marks registers as preserved on the non-exceptional return path, not in
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; the landing pad.
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declare dso_local i8* @__cxa_allocate_exception(i32) local_unnamed_addr
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declare dso_local void @__cxa_throw(i8*, i8*, i8*) local_unnamed_addr
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declare dso_local i32 @__gxx_personality_v0(...)
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declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone
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declare dso_local i8* @__cxa_begin_catch(i8*) local_unnamed_addr
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declare dso_local void @__cxa_end_catch() local_unnamed_addr
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@g = dso_local local_unnamed_addr global i32 0, align 4
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@_ZTIi = external dso_local constant i8*
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define dso_local i32 @_Z11maybe_throwv() minsize {
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; This function might return normally, or might throw an exception. r0 is used
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; for a return value, we can preserve r1-r3 for IPRA.
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; CHECK: .save {r1, r2, r3, lr}
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; CHECK-NEXT: push {r1, r2, r3, lr}
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; CHECK: pop{{(..)?}} {r1, r2, r3, pc}
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entry:
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%0 = load i32, i32* @g, align 4
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%tobool = icmp eq i32 %0, 0
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br i1 %tobool, label %if.else, label %if.then
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if.then: ; preds = %entry
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%exception = tail call i8* @__cxa_allocate_exception(i32 4)
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%1 = bitcast i8* %exception to i32*
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store i32 42, i32* %1, align 8
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tail call void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null)
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unreachable
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if.else: ; preds = %entry
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ret i32 1337
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}
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; Use inline assembly to force r0-r3 to be alive across a potentially throwing
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; call, using them on the non-exceptional return path. r0 is the return value,
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; so must be copied to another register. r1-r3 are voluntarily preserved by the
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; callee, so can be left in those registers.
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define dso_local i32 @_Z25test_non_exceptional_pathv() minsize personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
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; CHECK: @APP
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; CHECK-NEXT: @ def r0-r3
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; CHECK-NEXT: @NO_APP
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; CHECK-NEXT: mov [[SAVE_R0:r[0-9]+]], r0
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; CHECK-NEXT: .Ltmp{{.*}}
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; CHECK-NEXT: bl _Z11maybe_throwv
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; CHECK: mov r0, [[SAVE_R0]]
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; CHECK-NEXT: @APP
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; CHECK-NEXT: @ use r0-r3
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; CHECK-NEXT: @NO_APP
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entry:
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%0 = tail call { i32, i32, i32, i32 } asm sideeffect "// def r0-r3", "={r0},={r1},={r2},={r3}"()
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%call = invoke i32 @_Z11maybe_throwv()
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to label %try.cont unwind label %lpad
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lpad: ; preds = %entry
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%1 = landingpad { i8*, i32 }
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cleanup
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catch i8* bitcast (i8** @_ZTIi to i8*)
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%2 = extractvalue { i8*, i32 } %1, 1
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%3 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*))
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%matches = icmp eq i32 %2, %3
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br i1 %matches, label %catch, label %ehcleanup
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catch: ; preds = %lpad
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%4 = extractvalue { i8*, i32 } %1, 0
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%5 = tail call i8* @__cxa_begin_catch(i8* %4)
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%6 = bitcast i8* %5 to i32*
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%7 = load i32, i32* %6, align 4
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tail call void @__cxa_end_catch()
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br label %cleanup
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try.cont: ; preds = %entry
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%asmresult3 = extractvalue { i32, i32, i32, i32 } %0, 3
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%asmresult2 = extractvalue { i32, i32, i32, i32 } %0, 2
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%asmresult1 = extractvalue { i32, i32, i32, i32 } %0, 1
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%asmresult = extractvalue { i32, i32, i32, i32 } %0, 0
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tail call void asm sideeffect "// use r0-r3", "{r0},{r1},{r2},{r3}"(i32 %asmresult, i32 %asmresult1, i32 %asmresult2, i32 %asmresult3)
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br label %cleanup
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cleanup: ; preds = %try.cont, %catch
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%retval.0 = phi i32 [ 0, %try.cont ], [ %7, %catch ]
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ret i32 %retval.0
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ehcleanup: ; preds = %lpad
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resume { i8*, i32 } %1
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}
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; Use inline assembly to force r0-r3 to be alive across a potentially throwing
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; call, using them after catching the exception. IPRA does not currently mark
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; voluntarily preserved registers as live into the landing pad block, so all
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; four registers must be copied elsewhere.
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define dso_local i32 @_Z21test_exceptional_pathv() local_unnamed_addr minsize personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
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; CHECK: @APP
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; CHECK-NEXT: @ def r0-r3
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; CHECK-NEXT: @NO_APP
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; CHECK-DAG: mov [[SAVE_R0:r[0-9]+]], r0
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; CHECK-DAG: mov [[SAVE_R1:r[0-9]+]], r1
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; CHECK-DAG: mov [[SAVE_R2:r[0-9]+]], r2
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; CHECK-DAG: mov [[SAVE_R3:r[0-9]+]], r3
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; CHECK: bl _Z11maybe_throw
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; CHECK: bl __cxa_begin_catch
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; CHECK: mov r0, [[SAVE_R0]]
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; CHECK-NEXT: mov r1, [[SAVE_R1]]
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; CHECK-NEXT: mov r2, [[SAVE_R2]]
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; CHECK-NEXT: mov r3, [[SAVE_R3]]
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; CHECK-NEXT: @APP
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; CHECK-NEXT: @ use r0-r3
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; CHECK-NEXT: @NO_APP
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entry:
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%0 = tail call { i32, i32, i32, i32 } asm sideeffect "// def r0-r3", "={r0},={r1},={r2},={r3}"()
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%asmresult = extractvalue { i32, i32, i32, i32 } %0, 0
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%asmresult1 = extractvalue { i32, i32, i32, i32 } %0, 1
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%asmresult2 = extractvalue { i32, i32, i32, i32 } %0, 2
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%asmresult3 = extractvalue { i32, i32, i32, i32 } %0, 3
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%call = invoke i32 @_Z11maybe_throwv()
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to label %cleanup unwind label %lpad
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lpad: ; preds = %entry
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%1 = landingpad { i8*, i32 }
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cleanup
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catch i8* bitcast (i8** @_ZTIi to i8*)
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%2 = extractvalue { i8*, i32 } %1, 1
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%3 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*))
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%matches = icmp eq i32 %2, %3
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br i1 %matches, label %catch, label %ehcleanup
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catch: ; preds = %lpad
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%4 = extractvalue { i8*, i32 } %1, 0
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%5 = tail call i8* @__cxa_begin_catch(i8* %4)
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%6 = bitcast i8* %5 to i32*
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%7 = load i32, i32* %6, align 4
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tail call void asm sideeffect "// use r0-r3", "{r0},{r1},{r2},{r3}"(i32 %asmresult, i32 %asmresult1, i32 %asmresult2, i32 %asmresult3)
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tail call void @__cxa_end_catch()
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br label %cleanup
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cleanup: ; preds = %entry, %catch
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%retval.0 = phi i32 [ %7, %catch ], [ 0, %entry ]
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ret i32 %retval.0
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ehcleanup: ; preds = %lpad
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resume { i8*, i32 } %1
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}
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