.. |
AArch64
|
[AArch64][SVE] Rename intrinsics for gather prefetch [NFC]
|
2020-03-19 12:53:36 +00:00 |
AMDGPU
|
[NFC] Simplify test
|
2020-03-19 14:29:57 +01:00 |
ARC
|
…
|
|
ARM
|
[IPRA][ARM] Spill extra registers at -Oz
|
2020-03-18 13:51:16 +00:00 |
AVR
|
[AVR] Fix incorrect register state for LDRdPtr
|
2020-03-03 17:34:54 +08:00 |
BPF
|
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
|
2020-03-15 17:46:23 -07:00 |
Generic
|
[NFC] Add missing REQUIRES clause to a test
|
2020-03-18 16:35:10 +03:00 |
Hexagon
|
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
|
2020-03-15 17:46:23 -07:00 |
Inputs
|
…
|
|
Lanai
|
Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`"""
|
2020-02-13 10:16:06 -08:00 |
MIR
|
Reland D73534: [DebugInfo] Enable the debug entry values feature by default
|
2020-03-19 13:57:30 +01:00 |
MSP430
|
…
|
|
Mips
|
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES
|
2020-03-16 14:42:01 +01:00 |
NVPTX
|
ARM: Fixup some tests using denormal-fp-math attribute
|
2020-03-10 14:02:06 -04:00 |
PowerPC
|
[PowerPC] Remove UB from PPCInstrInfo when handling rotates fed by constants
|
2020-03-18 13:40:39 -05:00 |
RISCV
|
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
|
2020-03-15 17:46:23 -07:00 |
SPARC
|
[Sparc] Fix incorrect operand for matching CMPri pattern
|
2020-03-02 11:36:32 +08:00 |
SystemZ
|
[TargetLowering] Only demand a rotation's modulo amount bits
|
2020-03-17 21:23:46 +00:00 |
Thumb
|
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
|
2020-03-15 17:46:23 -07:00 |
Thumb2
|
[ARM,MVE] Add intrinsics for the VQDMLAD family.
|
2020-03-18 17:11:22 +00:00 |
VE
|
[VE] Target-specific bit size for sjljehprepare
|
2020-03-10 17:51:16 +01:00 |
WebAssembly
|
[WebAssembly] Fix SIMD shift unrolling to avoid assertion failure
|
2020-03-12 12:20:14 -07:00 |
WinCFGuard
|
…
|
|
WinEH
|
…
|
|
X86
|
Reland D73534: [DebugInfo] Enable the debug entry values feature by default
|
2020-03-19 13:57:30 +01:00 |
XCore
|
[XCore] Add instruction pattern for bitrev
|
2020-02-21 09:28:49 +08:00 |