forked from OSchip/llvm-project
21 lines
766 B
LLVM
21 lines
766 B
LLVM
; RUN: llc < %s
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; PR6374
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;
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; This test produces a DIV8r instruction and uses %AX instead of %AH and %AL.
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; The DIV8r must have the right imp-defs for that to work.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin10.0.0"
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%struct._i386_state = type { %union.anon }
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%union.anon = type { [0 x i8] }
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define void @i386_aam(%struct._i386_state* nocapture %cpustate) nounwind ssp {
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entry:
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%call = tail call fastcc signext i8 @FETCH() ; <i8> [#uses=1]
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%rem = urem i8 0, %call ; <i8> [#uses=1]
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store i8 %rem, i8* undef
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ret void
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}
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declare fastcc signext i8 @FETCH() nounwind readnone ssp
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