forked from OSchip/llvm-project
8c02c98259
Now even the small structures could be passed within byval (small enough
to be stored in GPRs).
In regression tests next function prototypes are checked:
PR15293:
%artz = type { i32 }
define void @foo(%artz* byval %s)
define void @foo2(%artz* byval %s, i32 %p, %artz* byval %s2)
foo: "s" stored in R0
foo2: "s" stored in R0, "s2" stored in R2.
Next AAPCS rules are checked:
5.5 Parameters Passing, C.4 and C.5,
"ParamSize" is parameter size in 32bit words:
-- NSAA != 0, NCRN < R4 and NCRN+ParamSize > R4.
Parameter should be sent to the stack; NCRN := R4.
-- NSAA != 0, and NCRN < R4, NCRN+ParamSize < R4.
Parameter stored in GPRs; NCRN += ParamSize.
llvm-svn: 181148
|
||
|---|---|---|
| .. | ||
| AArch64 | ||
| ARM | ||
| CPP | ||
| Generic | ||
| Hexagon | ||
| Inputs | ||
| MBlaze | ||
| MSP430 | ||
| Mips | ||
| NVPTX | ||
| PowerPC | ||
| R600 | ||
| SI | ||
| SPARC | ||
| Thumb | ||
| Thumb2 | ||
| X86 | ||
| XCore | ||