llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
# RUN: llc -march=amdgcn -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
---
name: inttoptr_s
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: inttoptr_s
; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; CHECK: [[INTTOPTR:%[0-9]+]]:sgpr(p4) = G_INTTOPTR [[COPY]](s64)
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(p4) = G_INTTOPTR %0
...
---
name: inttoptr_v
legalized: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: inttoptr_v
; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; CHECK: [[INTTOPTR:%[0-9]+]]:vgpr(p0) = G_INTTOPTR [[COPY]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(p0) = G_INTTOPTR %0
...