forked from OSchip/llvm-project
86 lines
2.7 KiB
YAML
86 lines
2.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GCN %s
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# RUN: FileCheck -check-prefix=ERR %s < %t
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GCN %s
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# RUN: FileCheck -check-prefix=ERR %s < %t
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# ERR-NOT: remark:
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# ERR: remark: <unknown>:0:0: cannot select: %2:sgpr(s32) = G_UMULH %0:sgpr, %1:sgpr (in function: umulh_s32_ss)
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# ERR-NOT: remark:
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---
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name: umulh_s32_ss
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1
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; GCN-LABEL: name: umulh_s32_ss
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; GCN: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GCN: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GCN: [[UMULH:%[0-9]+]]:sgpr(s32) = G_UMULH [[COPY]], [[COPY1]]
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; GCN: S_ENDPGM 0, implicit [[UMULH]](s32)
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = G_UMULH %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: umulh_s32_sv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; GCN-LABEL: name: umulh_s32_sv
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_MUL_HI_U32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32 [[COPY]], [[COPY1]], implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_MUL_HI_U32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = COPY $vgpr0
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%2:vgpr(s32) = G_UMULH %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: umulh_s32_vs
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; GCN-LABEL: name: umulh_s32_vs
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[V_MUL_HI_U32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32 [[COPY]], [[COPY1]], implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_MUL_HI_U32_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:sgpr(s32) = COPY $sgpr0
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%2:vgpr(s32) = G_UMULH %0, %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: umulh_s32_vv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GCN-LABEL: name: umulh_s32_vv
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN: [[V_MUL_HI_U32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32 [[COPY]], [[COPY1]], implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_MUL_HI_U32_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = G_UMULH %0, %1
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S_ENDPGM 0, implicit %2
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...
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