llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.mir

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# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefixes=GCN
---
name: fadd
legalized: true
regBankSelected: true
# GCN-LABEL: name: fadd
body: |
bb.0:
liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr3_vgpr4
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
%3:vgpr(p1) = COPY $vgpr3_vgpr4
; fadd vs
; GCN: V_ADD_F32_e64
%4:vgpr(s32) = G_FADD %1, %0
; fadd sv
; GCN: V_ADD_F32_e64
%5:vgpr(s32) = G_FADD %0, %1
; fadd vv
; GCN: V_ADD_F32_e64
%6:vgpr(s32) = G_FADD %1, %2
G_STORE %4, %3 :: (store 4, addrspace 1)
G_STORE %5, %3 :: (store 4, addrspace 1)
G_STORE %6, %3 :: (store 4, addrspace 1)
...