forked from OSchip/llvm-project
63 lines
1.7 KiB
YAML
63 lines
1.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
|
|
|
|
---
|
|
name: sffbh_s32_ss
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0
|
|
|
|
; CHECK-LABEL: name: sffbh_s32_ss
|
|
; CHECK: liveins: $sgpr0
|
|
; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; CHECK: [[S_FLBIT_I32_:%[0-9]+]]:sreg_32 = S_FLBIT_I32 [[COPY]]
|
|
; CHECK: S_ENDPGM 0, implicit [[S_FLBIT_I32_]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), %0
|
|
S_ENDPGM 0, implicit %1
|
|
...
|
|
|
|
---
|
|
name: sffbh_s32_vs
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0
|
|
|
|
; CHECK-LABEL: name: sffbh_s32_vs
|
|
; CHECK: liveins: $sgpr0
|
|
; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; CHECK: [[V_FFBH_I32_e64_:%[0-9]+]]:vgpr_32 = V_FFBH_I32_e64 [[COPY]], implicit $exec
|
|
; CHECK: S_ENDPGM 0, implicit [[V_FFBH_I32_e64_]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), %0
|
|
S_ENDPGM 0, implicit %1
|
|
...
|
|
|
|
---
|
|
name: sffbh_s32_vv
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
|
|
; CHECK-LABEL: name: sffbh_s32_vv
|
|
; CHECK: liveins: $vgpr0
|
|
; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; CHECK: [[V_FFBH_I32_e64_:%[0-9]+]]:vgpr_32 = V_FFBH_I32_e64 [[COPY]], implicit $exec
|
|
; CHECK: S_ENDPGM 0, implicit [[V_FFBH_I32_e64_]]
|
|
%0:vgpr(s32) = COPY $vgpr0
|
|
%1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), %0
|
|
S_ENDPGM 0, implicit %1
|
|
...
|