forked from OSchip/llvm-project
59 lines
1.9 KiB
LLVM
59 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s
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; Make sure the branch targets are correct after lowering llvm.amdgcn.if
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define i32 @divergent_if_swap_brtarget_order0(i32 %value) {
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; CHECK-LABEL: divergent_if_swap_brtarget_order0:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
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; CHECK-NEXT: ; implicit-def: $vgpr0
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; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc
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; CHECK-NEXT: s_cbranch_execz BB0_2
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; CHECK-NEXT: ; %bb.1: ; %if.true
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; CHECK-NEXT: global_load_dword v0, v[0:1], off
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; CHECK-NEXT: BB0_2: ; %endif
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; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]
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; CHECK-NEXT: s_waitcnt vmcnt(0)
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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entry:
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%c = icmp ne i32 %value, 0
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br i1 %c, label %if.true, label %endif
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if.true:
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%val = load volatile i32, i32 addrspace(1)* undef
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br label %endif
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endif:
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%v = phi i32 [ %val, %if.true ], [ undef, %entry ]
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ret i32 %v
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}
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define i32 @divergent_if_swap_brtarget_order1(i32 %value) {
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; CHECK-LABEL: divergent_if_swap_brtarget_order1:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
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; CHECK-NEXT: ; implicit-def: $vgpr0
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; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc
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; CHECK-NEXT: s_cbranch_execnz BB1_2
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; CHECK-NEXT: ; %bb.1: ; %if.true
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; CHECK-NEXT: global_load_dword v0, v[0:1], off
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; CHECK-NEXT: BB1_2: ; %endif
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; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]
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; CHECK-NEXT: s_waitcnt vmcnt(0)
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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entry:
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%c = icmp ne i32 %value, 0
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br i1 %c, label %if.true, label %endif
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endif:
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%v = phi i32 [ %val, %if.true ], [ undef, %entry ]
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ret i32 %v
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if.true:
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%val = load volatile i32, i32 addrspace(1)* undef
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br label %endif
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}
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