forked from OSchip/llvm-project
111 lines
3.5 KiB
LLVM
111 lines
3.5 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -mcpu=z13 -S -loop-simplifycfg -enable-mssa-loop-dependency -enable-loop-simplifycfg-term-folding -verify-memoryssa 2>&1 < %s | FileCheck %s
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target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
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@global = external dso_local local_unnamed_addr global i8, align 2
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@global.1 = external dso_local local_unnamed_addr global i32, align 4
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@global.2 = external dso_local local_unnamed_addr global i32, align 4
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@global.3 = external dso_local local_unnamed_addr global i16, align 2
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@global.4 = external dso_local local_unnamed_addr global i32, align 4
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; CHECK-LABEL: @test_01(
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define internal fastcc void @test_01() unnamed_addr {
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bb:
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%tmp = load i32, i32* @global.2, align 4
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%tmp1 = icmp eq i32 %tmp, 0
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br i1 %tmp1, label %bb3, label %bb2
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bb2: ; preds = %bb
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br label %bb7
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bb3: ; preds = %bb
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br label %bb4
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bb4: ; preds = %bb6, %bb3
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br i1 true, label %bb5, label %bb6
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bb5: ; preds = %bb4
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store i16 0, i16* @global.3, align 2
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br label %bb6
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bb6: ; preds = %bb5, %bb4
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br label %bb4
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bb7: ; preds = %bb7, %bb2
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%tmp8 = phi i32 [ 1, %bb7 ], [ 0, %bb2 ]
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%tmp9 = icmp eq i32 %tmp8, 0
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br i1 %tmp9, label %bb7, label %bb10
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bb10: ; preds = %bb7
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br label %bb11
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bb11: ; preds = %bb13, %bb10
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%tmp12 = icmp ult i32 %tmp, 6
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br i1 %tmp12, label %bb13, label %bb14
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bb13: ; preds = %bb11
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store i32 0, i32* @global.1, align 4
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br label %bb11
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bb14: ; preds = %bb11
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ret void
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}
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@global.5 = external dso_local local_unnamed_addr global i16, align 2
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declare dso_local void @spam() local_unnamed_addr
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declare dso_local void @blam() local_unnamed_addr
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declare dso_local i64 @quux.1() local_unnamed_addr
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declare dso_local void @bar() local_unnamed_addr
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; CHECK-LABEL: @test_02(
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define dso_local void @test_02(i8 signext %arg) local_unnamed_addr {
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bb:
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br label %bb1
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bb1: ; preds = %bb16, %bb
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%tmp = phi i8 [ %arg, %bb ], [ %tmp17, %bb16 ]
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%tmp2 = load i16, i16* @global.5, align 2
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%tmp3 = icmp ugt i16 %tmp2, 56
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br i1 %tmp3, label %bb4, label %bb18
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bb4: ; preds = %bb1
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%tmp5 = tail call i64 @quux.1()
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%tmp6 = icmp eq i64 %tmp5, 0
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br i1 %tmp6, label %bb13, label %bb7
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bb7: ; preds = %bb4
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br label %bb8
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bb8: ; preds = %bb8, %bb7
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%tmp9 = phi i32 [ 26, %bb7 ], [ %tmp10, %bb8 ]
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tail call void @bar()
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%tmp10 = add nsw i32 %tmp9, -1
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%tmp11 = icmp eq i32 %tmp10, 12
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br i1 %tmp11, label %bb12, label %bb8
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bb12: ; preds = %bb8
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br i1 false, label %bb14, label %bb16
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bb13: ; preds = %bb4
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tail call void @spam()
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br label %bb14
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bb14: ; preds = %bb13, %bb12
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%tmp15 = phi i8 [ -23, %bb12 ], [ %tmp, %bb13 ]
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tail call void @blam()
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br label %bb16
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bb16: ; preds = %bb14, %bb12
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%tmp17 = phi i8 [ %tmp15, %bb14 ], [ -23, %bb12 ]
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br label %bb1
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bb18: ; preds = %bb1
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ret void
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}
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