llvm-project/llvm/test/Transforms/HardwareLoops
David Green 73a6cd4b6b [ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR
This hints the operand of a t2DoLoopStart towards using LR, which can
help make it more likely to become t2DLS lr, lr. This makes it easier to
move if needed (as the input is the same as the output), or potentially
remove entirely.

The hint is added after others (from COPY's etc) which still take
precedence. It needed to find a place to add the hint, which currently
uses the post isel custom inserter.

Differential Revision: https://reviews.llvm.org/D89883
2020-11-10 16:28:57 +00:00
..
ARM [ARM] Add a RegAllocHint for hinting t2DoLoopStart towards LR 2020-11-10 16:28:57 +00:00
loop-guards.ll [ARM] Alter t2DoLoopStart to define lr 2020-11-10 15:57:58 +00:00
scalar-while.ll [ARM] Alter t2DoLoopStart to define lr 2020-11-10 15:57:58 +00:00
sibling-loops.ll [HardwareLoops] Remove unused check-prefixes 2020-11-09 17:50:19 +00:00
unconditional-latch.ll
unscevable.ll