forked from OSchip/llvm-project
179 lines
6.3 KiB
C++
179 lines
6.3 KiB
C++
//===--------------------- SchedulerStatistics.cpp --------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements the SchedulerStatistics interface.
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///
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//===----------------------------------------------------------------------===//
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#include "Views/SchedulerStatistics.h"
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#include "llvm/Support/Format.h"
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#include "llvm/Support/FormattedStream.h"
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namespace llvm {
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namespace mca {
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SchedulerStatistics::SchedulerStatistics(const llvm::MCSubtargetInfo &STI)
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: SM(STI.getSchedModel()), LQResourceID(0), SQResourceID(0), NumIssued(0),
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NumCycles(0), MostRecentLoadDispatched(~0U),
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MostRecentStoreDispatched(~0U),
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Usage(STI.getSchedModel().NumProcResourceKinds, {0, 0, 0}) {
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if (SM.hasExtraProcessorInfo()) {
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const MCExtraProcessorInfo &EPI = SM.getExtraProcessorInfo();
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LQResourceID = EPI.LoadQueueID;
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SQResourceID = EPI.StoreQueueID;
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}
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}
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// FIXME: This implementation works under the assumption that load/store queue
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// entries are reserved at 'instruction dispatched' stage, and released at
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// 'instruction executed' stage. This currently matches the behavior of LSUnit.
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//
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// The current design minimizes the number of events generated by the
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// Dispatch/Execute stages, at the cost of doing extra bookkeeping in method
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// `onEvent`. However, it introduces a subtle dependency between this view and
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// how the LSUnit works.
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//
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// In future we should add a new "memory queue" event type, so that we stop
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// making assumptions on how LSUnit internally works (See PR39828).
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void SchedulerStatistics::onEvent(const HWInstructionEvent &Event) {
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if (Event.Type == HWInstructionEvent::Issued) {
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const Instruction &Inst = *Event.IR.getInstruction();
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NumIssued += Inst.getDesc().NumMicroOps;
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} else if (Event.Type == HWInstructionEvent::Dispatched) {
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const Instruction &Inst = *Event.IR.getInstruction();
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const unsigned Index = Event.IR.getSourceIndex();
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if (LQResourceID && Inst.getDesc().MayLoad &&
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MostRecentLoadDispatched != Index) {
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Usage[LQResourceID].SlotsInUse++;
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MostRecentLoadDispatched = Index;
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}
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if (SQResourceID && Inst.getDesc().MayStore &&
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MostRecentStoreDispatched != Index) {
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Usage[SQResourceID].SlotsInUse++;
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MostRecentStoreDispatched = Index;
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}
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} else if (Event.Type == HWInstructionEvent::Executed) {
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const Instruction &Inst = *Event.IR.getInstruction();
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if (LQResourceID && Inst.getDesc().MayLoad) {
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assert(Usage[LQResourceID].SlotsInUse);
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Usage[LQResourceID].SlotsInUse--;
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}
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if (SQResourceID && Inst.getDesc().MayStore) {
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assert(Usage[SQResourceID].SlotsInUse);
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Usage[SQResourceID].SlotsInUse--;
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}
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}
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}
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void SchedulerStatistics::onReservedBuffers(const InstRef & /* unused */,
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ArrayRef<unsigned> Buffers) {
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for (const unsigned Buffer : Buffers) {
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if (Buffer == LQResourceID || Buffer == SQResourceID)
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continue;
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Usage[Buffer].SlotsInUse++;
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}
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}
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void SchedulerStatistics::onReleasedBuffers(const InstRef & /* unused */,
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ArrayRef<unsigned> Buffers) {
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for (const unsigned Buffer : Buffers) {
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if (Buffer == LQResourceID || Buffer == SQResourceID)
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continue;
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Usage[Buffer].SlotsInUse--;
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}
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}
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void SchedulerStatistics::updateHistograms() {
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for (BufferUsage &BU : Usage) {
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BU.CumulativeNumUsedSlots += BU.SlotsInUse;
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BU.MaxUsedSlots = std::max(BU.MaxUsedSlots, BU.SlotsInUse);
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}
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IssueWidthPerCycle[NumIssued]++;
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NumIssued = 0;
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}
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void SchedulerStatistics::printSchedulerStats(raw_ostream &OS) const {
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OS << "\n\nSchedulers - "
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<< "number of cycles where we saw N micro opcodes issued:\n";
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OS << "[# issued], [# cycles]\n";
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bool HasColors = OS.has_colors();
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const auto It =
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std::max_element(IssueWidthPerCycle.begin(), IssueWidthPerCycle.end());
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for (const std::pair<const unsigned, unsigned> &Entry : IssueWidthPerCycle) {
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unsigned NumIssued = Entry.first;
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if (NumIssued == It->first && HasColors)
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OS.changeColor(raw_ostream::SAVEDCOLOR, true, false);
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unsigned IPC = Entry.second;
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OS << " " << NumIssued << ", " << IPC << " ("
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<< format("%.1f", ((double)IPC / NumCycles) * 100) << "%)\n";
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if (HasColors)
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OS.resetColor();
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}
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}
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void SchedulerStatistics::printSchedulerUsage(raw_ostream &OS) const {
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assert(NumCycles && "Unexpected number of cycles!");
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OS << "\nScheduler's queue usage:\n";
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if (all_of(Usage, [](const BufferUsage &BU) { return !BU.MaxUsedSlots; })) {
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OS << "No scheduler resources used.\n";
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return;
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}
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OS << "[1] Resource name.\n"
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<< "[2] Average number of used buffer entries.\n"
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<< "[3] Maximum number of used buffer entries.\n"
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<< "[4] Total number of buffer entries.\n\n"
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<< " [1] [2] [3] [4]\n";
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formatted_raw_ostream FOS(OS);
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bool HasColors = FOS.has_colors();
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for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
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const MCProcResourceDesc &ProcResource = *SM.getProcResource(I);
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if (ProcResource.BufferSize <= 0)
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continue;
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const BufferUsage &BU = Usage[I];
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double AvgUsage = (double)BU.CumulativeNumUsedSlots / NumCycles;
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double AlmostFullThreshold = (double)(ProcResource.BufferSize * 4) / 5;
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unsigned NormalizedAvg = floor((AvgUsage * 10) + 0.5) / 10;
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unsigned NormalizedThreshold = floor((AlmostFullThreshold * 10) + 0.5) / 10;
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FOS << ProcResource.Name;
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FOS.PadToColumn(17);
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if (HasColors && NormalizedAvg >= NormalizedThreshold)
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FOS.changeColor(raw_ostream::YELLOW, true, false);
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FOS << NormalizedAvg;
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if (HasColors)
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FOS.resetColor();
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FOS.PadToColumn(28);
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if (HasColors &&
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BU.MaxUsedSlots == static_cast<unsigned>(ProcResource.BufferSize))
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FOS.changeColor(raw_ostream::RED, true, false);
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FOS << BU.MaxUsedSlots;
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if (HasColors)
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FOS.resetColor();
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FOS.PadToColumn(39);
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FOS << ProcResource.BufferSize << '\n';
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}
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FOS.flush();
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}
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void SchedulerStatistics::printView(raw_ostream &OS) const {
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printSchedulerStats(OS);
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printSchedulerUsage(OS);
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}
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} // namespace mca
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} // namespace llvm
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