llvm-project/llvm/test/MC/Disassembler/AArch64
Sam Parker 5f9346471c [AArch64] v8.3-a complex number support
New instructions are added to AArch32 and AArch64 to aid
floating-point multiplication and addition of complex numbers,
where the complex numbers are packed in a vector register as a
pair of elements. The Imaginary part of the number is placed in the
more significant element, and the Real part of the number is placed
in the less significant element.

Differential Revision: https://reviews.llvm.org/D36792

llvm-svn: 312228
2017-08-31 09:27:04 +00:00
..
a64-ignored-fields.txt
arm64-advsimd.txt
arm64-arithmetic.txt
arm64-basic-a64-undefined.txt
arm64-bitfield.txt
arm64-branch.txt
arm64-canonical-form.txt
arm64-crc32.txt
arm64-crypto.txt
arm64-invalid-logical.txt
arm64-logical.txt
arm64-memory.txt
arm64-non-apple-fmov.txt
arm64-scalar-fp.txt
arm64-system.txt
armv8.1a-atomic.txt
armv8.1a-lor.txt
armv8.1a-pan.txt
armv8.1a-rdma.txt
armv8.1a-vhe.txt
armv8.2a-at.txt
armv8.2a-dotprod.txt [ARM][AArch64] Cortex-A75 and Cortex-A55 support 2017-08-21 08:43:06 +00:00
armv8.2a-mmfr2.txt
armv8.2a-persistent-memory.txt
armv8.2a-statistical-profiling.txt
armv8.2a-uao.txt
armv8.3a-ID_ISAR6_EL1.txt [AArch64] IDSAR6 register assembler support 2017-08-31 08:36:45 +00:00
armv8.3a-complex.txt [AArch64] v8.3-a complex number support 2017-08-31 09:27:04 +00:00
armv8.3a-js.txt [ARM][AArch64] v8.3-A Javascript Conversion 2017-08-22 11:08:21 +00:00
armv8.3a-rcpc.txt [ARM][AArch64] Cortex-A75 and Cortex-A55 support 2017-08-21 08:43:06 +00:00
armv8.3a-signed-pointer.txt [AArch64] Enable ARMv8.3-A pointer authentication 2017-08-11 13:14:00 +00:00
basic-a64-instructions.txt [AArch64] armv8-A doesn't have CRC. 2017-05-03 20:33:52 +00:00
basic-a64-undefined.txt
basic-a64-unpredictable.txt
fullfp16-neg.txt
fullfp16-neon-neg.txt
gicv3-regs.txt
ldp-offset-predictable.txt
ldp-postind.predictable.txt
ldp-preind.predictable.txt
lit.local.cfg
neon-instructions.txt
ras-extension.txt
trace-regs.txt