forked from OSchip/llvm-project
169df4e24b
Previously, the 'movep' instruction was defined for microMIPS32r3 and shared that definition with microMIPS32R6. 'movep' was re-encoded for microMIPS32r6, so this patch provides the correct encoding. Secondly, correct the encoding of the 'rs' and 'rt' operands which have an instruction specific encoding for the registers those operands accept. Finally, correct the decoding of the 'dst_regs' operand which was extracting the relevant field from the instruction, but was actually extracting the field from the alreadly extracted field. Reviewers: atanasyan Differential Revision: https://reviews.llvm.org/D39495 llvm-svn: 317475 |
||
---|---|---|
.. | ||
AArch64 | ||
AMDGPU | ||
ARC | ||
ARM | ||
Hexagon | ||
Lanai | ||
Mips | ||
PowerPC | ||
Sparc | ||
SystemZ | ||
X86 | ||
XCore |