History

Lei Zhang 4ba45a778a [mlir][StandardToSPIRV] Fix conversion for signed remainder Per the Vulkan's SPIR-V environment spec, "for the OpSRem and OpSMod instructions, if either operand is negative the result is undefined." So we cannot directly use spv.SRem/spv.SMod if either operand can be negative. Emulate it via spv.UMod. Because the emulation uses spv.SNegate, this commit also defines spv.SNegate. Differential Revision: https://reviews.llvm.org/D83679		2020-07-13 16:15:31 -04:00
..
cmake/modules	Install the MLIRTableGen static library.	2020-06-11 18:23:24 -07:00
docs	Add Python bindings guide.	2020-07-09 20:49:39 -07:00
examples	[MLIR] Add variadic isa<> for Type, Value, and Attribute	2020-06-29 15:04:48 -07:00
include	[mlir][StandardToSPIRV] Fix conversion for signed remainder	2020-07-13 16:15:31 -04:00
integration_test	[mlir] [VectorOps] Allow AXPY to be expressed as special case of OUTERPRODUCT	2020-07-10 12:23:24 -07:00
lib	[mlir][StandardToSPIRV] Fix conversion for signed remainder	2020-07-13 16:15:31 -04:00
test	[mlir][StandardToSPIRV] Fix conversion for signed remainder	2020-07-13 16:15:31 -04:00
tools	[mlir][ODS] Add support for specifying the namespace of an interface.	2020-07-12 14:18:32 -07:00
unittests	[NFC] Fix comment style in MLIR unittests to conform to LLVM coding standards.	2020-07-12 07:27:02 -07:00
utils	[mlir][NFC] Remove usernames and google bug numbers from TODO comments.	2020-07-07 01:40:52 -07:00
.clang-format	…
.clang-tidy	Fix MLIR clang-tidy: when tweaking it does not inherit from the parent	2020-03-07 17:44:21 +00:00
CMakeLists.txt	Initial boiler-plate for python bindings.	2020-07-09 12:03:58 -07:00
LICENSE.TXT	Add the Apache2 with LLVM exceptions license to MLIR	2019-12-24 00:58:06 -08:00
README.md	mlir README.md: Fix the syntax	2019-12-24 13:31:07 +01:00

README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.