forked from OSchip/llvm-project
68 lines
2.7 KiB
ArmAsm
68 lines
2.7 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
|
|
|
|
|
|
// --------------------------------------------------------------------------//
|
|
// Immediate out of lower bound [-24, 21].
|
|
|
|
ld3d {z12.d, z13.d, z14.d}, p4/z, [x12, #-27, MUL VL]
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 3 in range [-24, 21].
|
|
// CHECK-NEXT: ld3d {z12.d, z13.d, z14.d}, p4/z, [x12, #-27, MUL VL]
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
ld3d {z7.d, z8.d, z9.d}, p3/z, [x1, #24, MUL VL]
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 3 in range [-24, 21].
|
|
// CHECK-NEXT: ld3d {z7.d, z8.d, z9.d}, p3/z, [x1, #24, MUL VL]
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
|
|
// --------------------------------------------------------------------------//
|
|
// Immediate not a multiple of three.
|
|
|
|
ld3d {z12.d, z13.d, z14.d}, p4/z, [x12, #-7, MUL VL]
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 3 in range [-24, 21].
|
|
// CHECK-NEXT: ld3d {z12.d, z13.d, z14.d}, p4/z, [x12, #-7, MUL VL]
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
ld3d {z7.d, z8.d, z9.d}, p3/z, [x1, #5, MUL VL]
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 3 in range [-24, 21].
|
|
// CHECK-NEXT: ld3d {z7.d, z8.d, z9.d}, p3/z, [x1, #5, MUL VL]
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
|
|
// --------------------------------------------------------------------------//
|
|
// error: restricted predicate has range [0, 7].
|
|
|
|
ld3d {z2.d, z3.d, z4.d}, p8/z, [x15, #10, MUL VL]
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
|
|
// CHECK-NEXT: ld3d {z2.d, z3.d, z4.d}, p8/z, [x15, #10, MUL VL]
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
|
|
// --------------------------------------------------------------------------//
|
|
// Invalid vector list.
|
|
|
|
ld3d { }, p0/z, [x0]
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected
|
|
// CHECK-NEXT: ld3d { }, p0/z, [x0]
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
ld3d { z0.d, z1.d, z2.d, z3.d }, p0/z, [x0]
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
|
// CHECK-NEXT: ld3d { z0.d, z1.d, z2.d, z3.d }, p0/z, [x0]
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
ld3d { z0.d, z1.d, z2.b }, p0/z, [x0]
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
|
|
// CHECK-NEXT: ld3d { z0.d, z1.d, z2.b }, p0/z, [x0]
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
ld3d { z0.d, z1.d, z3.d }, p0/z, [x0]
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: registers must be sequential
|
|
// CHECK-NEXT: ld3d { z0.d, z1.d, z3.d }, p0/z, [x0]
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
|
|
|
ld3d { v0.2d, v1.2d, v2.2d }, p0/z, [x0]
|
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
|
// CHECK-NEXT: ld3d { v0.2d, v1.2d, v2.2d }, p0/z, [x0]
|
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|