| .. |
|
AArch64
|
GlobalISel: Add known bits to InstructionSelector
|
2019-08-29 17:24:32 +00:00 |
|
AMDGPU
|
AMDGPU: Don't use frame virtual registers
|
2019-08-29 01:13:47 +00:00 |
|
ARC
|
…
|
|
|
ARM
|
[DebugInfo] LiveDebugValues: correctly discriminate kinds of variable locations
|
2019-08-29 11:20:54 +00:00 |
|
AVR
|
…
|
|
|
BPF
|
[BPF] Fix bpf llvm-objdump issues.
|
2019-08-17 22:12:00 +00:00 |
|
Generic
|
[GlobalISel] Handle multiple registers in dbg.value intrinsic
|
2019-08-20 16:28:37 +00:00 |
|
Hexagon
|
[Hexagon] Improve generated code for test-if-bit-clear
|
2019-08-26 19:08:08 +00:00 |
|
Inputs
|
[CodeGen] Add stack protector tests where the guard gets re-assigned
|
2019-07-17 20:46:16 +00:00 |
|
Lanai
|
[SDAG] commute setcc operands to match a subtract
|
2019-07-10 23:23:54 +00:00 |
|
MIR
|
AMDGPU: Add amdgpu-32bit-address-high-bits to MIR serialization
|
2019-08-27 18:18:38 +00:00 |
|
MSP430
|
…
|
|
|
Mips
|
GlobalISel/TableGen: Handle setcc patterns
|
2019-08-29 01:13:41 +00:00 |
|
NVPTX
|
[NVPTX] Fix PR41651
|
2019-07-30 19:52:01 +00:00 |
|
PowerPC
|
Revert enabling MemorySSA.
|
2019-08-29 19:01:23 +00:00 |
|
RISCV
|
[RISCV] Fix callee-saved-gprs.ll test ABIs
|
2019-08-29 14:05:59 +00:00 |
|
SPARC
|
[test] Fix tests when run on windows after SVN r369426. NFC.
|
2019-08-20 20:58:02 +00:00 |
|
SystemZ
|
[SystemZ] Regenerate <8 x i31> store test
|
2019-07-29 09:49:23 +00:00 |
|
Thumb
|
[MBP] Disable aggressive loop rotate in plain mode
|
2019-08-22 16:21:32 +00:00 |
|
Thumb2
|
[ARM] MVE Masked loads and stores
|
2019-08-29 10:54:35 +00:00 |
|
WebAssembly
|
[WebAssembly] Add atomic.fence instruction
|
2019-08-28 23:13:43 +00:00 |
|
WinCFGuard
|
…
|
|
|
WinEH
|
IR: print value numbers for unnamed function arguments
|
2019-08-03 14:28:34 +00:00 |
|
X86
|
[X86] Remove what little support we had for MPX
|
2019-08-29 18:09:02 +00:00 |
|
XCore
|
…
|
|
4b87023bae