forked from OSchip/llvm-project
132 lines
5.3 KiB
C++
132 lines
5.3 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPU.h"
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#include "AMDGPUArgumentUsageInfo.h"
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#include "SIRegisterInfo.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "amdgpu-argument-reg-usage-info"
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INITIALIZE_PASS(AMDGPUArgumentUsageInfo, DEBUG_TYPE,
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"Argument Register Usage Information Storage", false, true)
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void ArgDescriptor::print(raw_ostream &OS,
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const TargetRegisterInfo *TRI) const {
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if (!isSet()) {
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OS << "<not set>\n";
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return;
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}
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if (isRegister())
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OS << "Reg " << printReg(getRegister(), TRI) << '\n';
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else
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OS << "Stack offset " << getStackOffset() << '\n';
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}
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char AMDGPUArgumentUsageInfo::ID = 0;
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const AMDGPUFunctionArgInfo AMDGPUArgumentUsageInfo::ExternFunctionInfo{};
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bool AMDGPUArgumentUsageInfo::doInitialization(Module &M) {
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return false;
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}
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bool AMDGPUArgumentUsageInfo::doFinalization(Module &M) {
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ArgInfoMap.clear();
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return false;
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}
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void AMDGPUArgumentUsageInfo::print(raw_ostream &OS, const Module *M) const {
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for (const auto &FI : ArgInfoMap) {
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OS << "Arguments for " << FI.first->getName() << '\n'
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<< " PrivateSegmentBuffer: " << FI.second.PrivateSegmentBuffer
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<< " DispatchPtr: " << FI.second.DispatchPtr
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<< " QueuePtr: " << FI.second.QueuePtr
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<< " KernargSegmentPtr: " << FI.second.KernargSegmentPtr
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<< " DispatchID: " << FI.second.DispatchID
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<< " FlatScratchInit: " << FI.second.FlatScratchInit
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<< " PrivateSegmentSize: " << FI.second.PrivateSegmentSize
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<< " GridWorkgroupCountX: " << FI.second.GridWorkGroupCountX
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<< " GridWorkgroupCountY: " << FI.second.GridWorkGroupCountY
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<< " GridWorkgroupCountZ: " << FI.second.GridWorkGroupCountZ
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<< " WorkGroupIDX: " << FI.second.WorkGroupIDX
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<< " WorkGroupIDY: " << FI.second.WorkGroupIDY
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<< " WorkGroupIDZ: " << FI.second.WorkGroupIDZ
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<< " WorkGroupInfo: " << FI.second.WorkGroupInfo
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<< " PrivateSegmentWaveByteOffset: "
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<< FI.second.PrivateSegmentWaveByteOffset
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<< " ImplicitBufferPtr: " << FI.second.ImplicitBufferPtr
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<< " ImplicitArgPtr: " << FI.second.ImplicitArgPtr
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<< " WorkItemIDX " << FI.second.WorkItemIDX
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<< " WorkItemIDY " << FI.second.WorkItemIDY
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<< " WorkItemIDZ " << FI.second.WorkItemIDZ
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<< '\n';
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}
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}
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std::pair<const ArgDescriptor *, const TargetRegisterClass *>
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AMDGPUFunctionArgInfo::getPreloadedValue(
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AMDGPUFunctionArgInfo::PreloadedValue Value) const {
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switch (Value) {
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case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_BUFFER: {
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return std::make_pair(
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PrivateSegmentBuffer ? &PrivateSegmentBuffer : nullptr,
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&AMDGPU::SGPR_128RegClass);
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}
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case AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR:
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return std::make_pair(ImplicitBufferPtr ? &ImplicitBufferPtr : nullptr,
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&AMDGPU::SGPR_64RegClass);
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case AMDGPUFunctionArgInfo::WORKGROUP_ID_X:
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return std::make_pair(WorkGroupIDX ? &WorkGroupIDX : nullptr,
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&AMDGPU::SGPR_32RegClass);
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case AMDGPUFunctionArgInfo::WORKGROUP_ID_Y:
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return std::make_pair(WorkGroupIDY ? &WorkGroupIDY : nullptr,
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&AMDGPU::SGPR_32RegClass);
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case AMDGPUFunctionArgInfo::WORKGROUP_ID_Z:
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return std::make_pair(WorkGroupIDZ ? &WorkGroupIDZ : nullptr,
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&AMDGPU::SGPR_32RegClass);
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case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_WAVE_BYTE_OFFSET:
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return std::make_pair(
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PrivateSegmentWaveByteOffset ? &PrivateSegmentWaveByteOffset : nullptr,
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&AMDGPU::SGPR_32RegClass);
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case AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR:
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return std::make_pair(KernargSegmentPtr ? &KernargSegmentPtr : nullptr,
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&AMDGPU::SGPR_64RegClass);
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case AMDGPUFunctionArgInfo::IMPLICIT_ARG_PTR:
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return std::make_pair(ImplicitArgPtr ? &ImplicitArgPtr : nullptr,
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&AMDGPU::SGPR_64RegClass);
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case AMDGPUFunctionArgInfo::DISPATCH_ID:
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return std::make_pair(DispatchID ? &DispatchID : nullptr,
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&AMDGPU::SGPR_64RegClass);
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case AMDGPUFunctionArgInfo::FLAT_SCRATCH_INIT:
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return std::make_pair(FlatScratchInit ? &FlatScratchInit : nullptr,
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&AMDGPU::SGPR_64RegClass);
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case AMDGPUFunctionArgInfo::DISPATCH_PTR:
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return std::make_pair(DispatchPtr ? &DispatchPtr : nullptr,
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&AMDGPU::SGPR_64RegClass);
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case AMDGPUFunctionArgInfo::QUEUE_PTR:
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return std::make_pair(QueuePtr ? &QueuePtr : nullptr,
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&AMDGPU::SGPR_64RegClass);
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case AMDGPUFunctionArgInfo::WORKITEM_ID_X:
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return std::make_pair(WorkItemIDX ? &WorkItemIDX : nullptr,
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&AMDGPU::VGPR_32RegClass);
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case AMDGPUFunctionArgInfo::WORKITEM_ID_Y:
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return std::make_pair(WorkItemIDY ? &WorkItemIDY : nullptr,
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&AMDGPU::VGPR_32RegClass);
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case AMDGPUFunctionArgInfo::WORKITEM_ID_Z:
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return std::make_pair(WorkItemIDZ ? &WorkItemIDZ : nullptr,
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&AMDGPU::VGPR_32RegClass);
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}
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llvm_unreachable("unexpected preloaded value type");
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}
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