forked from OSchip/llvm-project
1230 lines
43 KiB
C++
1230 lines
43 KiB
C++
//===- LiveDebugVariables.cpp - Tracking debug info variables -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LiveDebugVariables analysis.
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//
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// Remove all DBG_VALUE instructions referencing virtual registers and replace
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// them with a data structure tracking where live user variables are kept - in a
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// virtual register or in a stack slot.
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//
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// Allow the data structure to be updated during register allocation when values
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// are moved between registers and stack slots. Finally emit new DBG_VALUE
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// instructions after register allocation is complete.
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//
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//===----------------------------------------------------------------------===//
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#include "LiveDebugVariables.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/IntervalMap.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/CodeGen/LexicalScopes.h"
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#include "llvm/CodeGen/LiveInterval.h"
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#include "llvm/CodeGen/LiveIntervals.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/SlotIndexes.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetOpcodes.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/CodeGen/VirtRegMap.h"
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#include "llvm/IR/DebugInfoMetadata.h"
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#include "llvm/IR/DebugLoc.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Metadata.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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#include <cassert>
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#include <iterator>
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#include <memory>
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#include <utility>
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using namespace llvm;
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#define DEBUG_TYPE "livedebugvars"
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static cl::opt<bool>
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EnableLDV("live-debug-variables", cl::init(true),
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cl::desc("Enable the live debug variables pass"), cl::Hidden);
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STATISTIC(NumInsertedDebugValues, "Number of DBG_VALUEs inserted");
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char LiveDebugVariables::ID = 0;
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INITIALIZE_PASS_BEGIN(LiveDebugVariables, DEBUG_TYPE,
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"Debug Variable Analysis", false, false)
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INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
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INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
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INITIALIZE_PASS_END(LiveDebugVariables, DEBUG_TYPE,
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"Debug Variable Analysis", false, false)
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void LiveDebugVariables::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<MachineDominatorTree>();
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AU.addRequiredTransitive<LiveIntervals>();
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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LiveDebugVariables::LiveDebugVariables() : MachineFunctionPass(ID) {
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initializeLiveDebugVariablesPass(*PassRegistry::getPassRegistry());
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}
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enum : unsigned { UndefLocNo = ~0U };
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/// Describes a location by number along with some flags about the original
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/// usage of the location.
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class DbgValueLocation {
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public:
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DbgValueLocation(unsigned LocNo, bool WasIndirect)
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: LocNo(LocNo), WasIndirect(WasIndirect) {
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static_assert(sizeof(*this) == sizeof(unsigned), "bad bitfield packing");
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assert(locNo() == LocNo && "location truncation");
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}
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DbgValueLocation() : LocNo(0), WasIndirect(0) {}
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unsigned locNo() const {
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// Fix up the undef location number, which gets truncated.
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return LocNo == INT_MAX ? UndefLocNo : LocNo;
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}
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bool wasIndirect() const { return WasIndirect; }
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bool isUndef() const { return locNo() == UndefLocNo; }
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DbgValueLocation changeLocNo(unsigned NewLocNo) const {
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return DbgValueLocation(NewLocNo, WasIndirect);
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}
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friend inline bool operator==(const DbgValueLocation &LHS,
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const DbgValueLocation &RHS) {
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return LHS.LocNo == RHS.LocNo && LHS.WasIndirect == RHS.WasIndirect;
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}
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friend inline bool operator!=(const DbgValueLocation &LHS,
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const DbgValueLocation &RHS) {
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return !(LHS == RHS);
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}
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private:
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unsigned LocNo : 31;
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unsigned WasIndirect : 1;
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};
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/// LocMap - Map of where a user value is live, and its location.
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using LocMap = IntervalMap<SlotIndex, DbgValueLocation, 4>;
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namespace {
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class LDVImpl;
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/// UserValue - A user value is a part of a debug info user variable.
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///
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/// A DBG_VALUE instruction notes that (a sub-register of) a virtual register
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/// holds part of a user variable. The part is identified by a byte offset.
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///
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/// UserValues are grouped into equivalence classes for easier searching. Two
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/// user values are related if they refer to the same variable, or if they are
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/// held by the same virtual register. The equivalence class is the transitive
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/// closure of that relation.
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class UserValue {
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const DILocalVariable *Variable; ///< The debug info variable we are part of.
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const DIExpression *Expression; ///< Any complex address expression.
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DebugLoc dl; ///< The debug location for the variable. This is
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///< used by dwarf writer to find lexical scope.
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UserValue *leader; ///< Equivalence class leader.
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UserValue *next = nullptr; ///< Next value in equivalence class, or null.
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/// Numbered locations referenced by locmap.
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SmallVector<MachineOperand, 4> locations;
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/// Map of slot indices where this value is live.
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LocMap locInts;
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/// Set of interval start indexes that have been trimmed to the
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/// lexical scope.
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SmallSet<SlotIndex, 2> trimmedDefs;
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/// insertDebugValue - Insert a DBG_VALUE into MBB at Idx for LocNo.
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void insertDebugValue(MachineBasicBlock *MBB, SlotIndex StartIdx,
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SlotIndex StopIdx,
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DbgValueLocation Loc, bool Spilled, LiveIntervals &LIS,
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const TargetInstrInfo &TII,
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const TargetRegisterInfo &TRI);
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/// splitLocation - Replace OldLocNo ranges with NewRegs ranges where NewRegs
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/// is live. Returns true if any changes were made.
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bool splitLocation(unsigned OldLocNo, ArrayRef<unsigned> NewRegs,
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LiveIntervals &LIS);
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public:
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/// UserValue - Create a new UserValue.
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UserValue(const DILocalVariable *var, const DIExpression *expr, DebugLoc L,
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LocMap::Allocator &alloc)
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: Variable(var), Expression(expr), dl(std::move(L)), leader(this),
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locInts(alloc) {}
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/// getLeader - Get the leader of this value's equivalence class.
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UserValue *getLeader() {
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UserValue *l = leader;
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while (l != l->leader)
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l = l->leader;
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return leader = l;
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}
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/// getNext - Return the next UserValue in the equivalence class.
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UserValue *getNext() const { return next; }
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/// match - Does this UserValue match the parameters?
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bool match(const DILocalVariable *Var, const DIExpression *Expr,
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const DILocation *IA) const {
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// FIXME: The fragment should be part of the equivalence class, but not
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// other things in the expression like stack values.
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return Var == Variable && Expr == Expression && dl->getInlinedAt() == IA;
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}
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/// merge - Merge equivalence classes.
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static UserValue *merge(UserValue *L1, UserValue *L2) {
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L2 = L2->getLeader();
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if (!L1)
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return L2;
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L1 = L1->getLeader();
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if (L1 == L2)
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return L1;
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// Splice L2 before L1's members.
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UserValue *End = L2;
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while (End->next) {
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End->leader = L1;
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End = End->next;
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}
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End->leader = L1;
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End->next = L1->next;
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L1->next = L2;
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return L1;
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}
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/// getLocationNo - Return the location number that matches Loc.
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unsigned getLocationNo(const MachineOperand &LocMO) {
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if (LocMO.isReg()) {
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if (LocMO.getReg() == 0)
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return UndefLocNo;
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// For register locations we dont care about use/def and other flags.
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for (unsigned i = 0, e = locations.size(); i != e; ++i)
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if (locations[i].isReg() &&
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locations[i].getReg() == LocMO.getReg() &&
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locations[i].getSubReg() == LocMO.getSubReg())
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return i;
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} else
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for (unsigned i = 0, e = locations.size(); i != e; ++i)
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if (LocMO.isIdenticalTo(locations[i]))
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return i;
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locations.push_back(LocMO);
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// We are storing a MachineOperand outside a MachineInstr.
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locations.back().clearParent();
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// Don't store def operands.
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if (locations.back().isReg()) {
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if (locations.back().isDef())
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locations.back().setIsDead(false);
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locations.back().setIsUse();
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}
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return locations.size() - 1;
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}
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/// mapVirtRegs - Ensure that all virtual register locations are mapped.
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void mapVirtRegs(LDVImpl *LDV);
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/// addDef - Add a definition point to this value.
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void addDef(SlotIndex Idx, const MachineOperand &LocMO, bool IsIndirect) {
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DbgValueLocation Loc(getLocationNo(LocMO), IsIndirect);
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// Add a singular (Idx,Idx) -> Loc mapping.
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LocMap::iterator I = locInts.find(Idx);
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if (!I.valid() || I.start() != Idx)
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I.insert(Idx, Idx.getNextSlot(), Loc);
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else
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// A later DBG_VALUE at the same SlotIndex overrides the old location.
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I.setValue(Loc);
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}
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/// extendDef - Extend the current definition as far as possible down.
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/// Stop when meeting an existing def or when leaving the live
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/// range of VNI.
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/// End points where VNI is no longer live are added to Kills.
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/// @param Idx Starting point for the definition.
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/// @param Loc Location number to propagate.
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/// @param LR Restrict liveness to where LR has the value VNI. May be null.
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/// @param VNI When LR is not null, this is the value to restrict to.
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/// @param Kills Append end points of VNI's live range to Kills.
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/// @param LIS Live intervals analysis.
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void extendDef(SlotIndex Idx, DbgValueLocation Loc,
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LiveRange *LR, const VNInfo *VNI,
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SmallVectorImpl<SlotIndex> *Kills,
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LiveIntervals &LIS);
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/// addDefsFromCopies - The value in LI/LocNo may be copies to other
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/// registers. Determine if any of the copies are available at the kill
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/// points, and add defs if possible.
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/// @param LI Scan for copies of the value in LI->reg.
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/// @param LocNo Location number of LI->reg.
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/// @param WasIndirect Indicates if the original use of LI->reg was indirect
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/// @param Kills Points where the range of LocNo could be extended.
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/// @param NewDefs Append (Idx, LocNo) of inserted defs here.
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void addDefsFromCopies(
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LiveInterval *LI, unsigned LocNo, bool WasIndirect,
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const SmallVectorImpl<SlotIndex> &Kills,
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SmallVectorImpl<std::pair<SlotIndex, DbgValueLocation>> &NewDefs,
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MachineRegisterInfo &MRI, LiveIntervals &LIS);
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/// computeIntervals - Compute the live intervals of all locations after
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/// collecting all their def points.
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void computeIntervals(MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
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LiveIntervals &LIS, LexicalScopes &LS);
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/// splitRegister - Replace OldReg ranges with NewRegs ranges where NewRegs is
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/// live. Returns true if any changes were made.
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bool splitRegister(unsigned OldLocNo, ArrayRef<unsigned> NewRegs,
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LiveIntervals &LIS);
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/// rewriteLocations - Rewrite virtual register locations according to the
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/// provided virtual register map. Record which locations were spilled.
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void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI,
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BitVector &SpilledLocations);
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/// emitDebugValues - Recreate DBG_VALUE instruction from data structures.
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void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
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const TargetInstrInfo &TII,
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const TargetRegisterInfo &TRI,
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const BitVector &SpilledLocations);
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/// getDebugLoc - Return DebugLoc of this UserValue.
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DebugLoc getDebugLoc() { return dl;}
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void print(raw_ostream &, const TargetRegisterInfo *);
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};
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/// LDVImpl - Implementation of the LiveDebugVariables pass.
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class LDVImpl {
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LiveDebugVariables &pass;
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LocMap::Allocator allocator;
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MachineFunction *MF = nullptr;
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LiveIntervals *LIS;
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const TargetRegisterInfo *TRI;
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/// Whether emitDebugValues is called.
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bool EmitDone = false;
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/// Whether the machine function is modified during the pass.
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bool ModifiedMF = false;
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/// userValues - All allocated UserValue instances.
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SmallVector<std::unique_ptr<UserValue>, 8> userValues;
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/// Map virtual register to eq class leader.
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using VRMap = DenseMap<unsigned, UserValue *>;
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VRMap virtRegToEqClass;
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/// Map user variable to eq class leader.
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using UVMap = DenseMap<const DILocalVariable *, UserValue *>;
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UVMap userVarMap;
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/// getUserValue - Find or create a UserValue.
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UserValue *getUserValue(const DILocalVariable *Var, const DIExpression *Expr,
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const DebugLoc &DL);
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/// lookupVirtReg - Find the EC leader for VirtReg or null.
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UserValue *lookupVirtReg(unsigned VirtReg);
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/// handleDebugValue - Add DBG_VALUE instruction to our maps.
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/// @param MI DBG_VALUE instruction
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/// @param Idx Last valid SLotIndex before instruction.
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/// @return True if the DBG_VALUE instruction should be deleted.
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bool handleDebugValue(MachineInstr &MI, SlotIndex Idx);
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/// collectDebugValues - Collect and erase all DBG_VALUE instructions, adding
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/// a UserValue def for each instruction.
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/// @param mf MachineFunction to be scanned.
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/// @return True if any debug values were found.
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bool collectDebugValues(MachineFunction &mf);
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/// computeIntervals - Compute the live intervals of all user values after
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/// collecting all their def points.
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void computeIntervals();
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public:
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LDVImpl(LiveDebugVariables *ps) : pass(*ps) {}
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bool runOnMachineFunction(MachineFunction &mf);
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/// clear - Release all memory.
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void clear() {
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MF = nullptr;
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userValues.clear();
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virtRegToEqClass.clear();
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userVarMap.clear();
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// Make sure we call emitDebugValues if the machine function was modified.
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assert((!ModifiedMF || EmitDone) &&
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"Dbg values are not emitted in LDV");
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EmitDone = false;
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ModifiedMF = false;
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}
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/// mapVirtReg - Map virtual register to an equivalence class.
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void mapVirtReg(unsigned VirtReg, UserValue *EC);
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/// splitRegister - Replace all references to OldReg with NewRegs.
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void splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs);
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/// emitDebugValues - Recreate DBG_VALUE instruction from data structures.
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void emitDebugValues(VirtRegMap *VRM);
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void print(raw_ostream&);
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};
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} // end anonymous namespace
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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static void printDebugLoc(const DebugLoc &DL, raw_ostream &CommentOS,
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const LLVMContext &Ctx) {
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if (!DL)
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return;
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auto *Scope = cast<DIScope>(DL.getScope());
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// Omit the directory, because it's likely to be long and uninteresting.
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CommentOS << Scope->getFilename();
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CommentOS << ':' << DL.getLine();
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if (DL.getCol() != 0)
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CommentOS << ':' << DL.getCol();
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DebugLoc InlinedAtDL = DL.getInlinedAt();
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if (!InlinedAtDL)
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return;
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CommentOS << " @[ ";
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printDebugLoc(InlinedAtDL, CommentOS, Ctx);
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CommentOS << " ]";
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}
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static void printExtendedName(raw_ostream &OS, const DILocalVariable *V,
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const DILocation *DL) {
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const LLVMContext &Ctx = V->getContext();
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StringRef Res = V->getName();
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if (!Res.empty())
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OS << Res << "," << V->getLine();
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if (auto *InlinedAt = DL->getInlinedAt()) {
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if (DebugLoc InlinedAtDL = InlinedAt) {
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OS << " @[";
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printDebugLoc(InlinedAtDL, OS, Ctx);
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OS << "]";
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}
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}
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}
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void UserValue::print(raw_ostream &OS, const TargetRegisterInfo *TRI) {
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auto *DV = cast<DILocalVariable>(Variable);
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OS << "!\"";
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printExtendedName(OS, DV, dl);
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OS << "\"\t";
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for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I) {
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OS << " [" << I.start() << ';' << I.stop() << "):";
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if (I.value().isUndef())
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OS << "undef";
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else {
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OS << I.value().locNo();
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if (I.value().wasIndirect())
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OS << " ind";
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}
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}
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for (unsigned i = 0, e = locations.size(); i != e; ++i) {
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OS << " Loc" << i << '=';
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locations[i].print(OS, TRI);
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}
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OS << '\n';
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}
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void LDVImpl::print(raw_ostream &OS) {
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OS << "********** DEBUG VARIABLES **********\n";
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for (unsigned i = 0, e = userValues.size(); i != e; ++i)
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userValues[i]->print(OS, TRI);
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}
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#endif
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void UserValue::mapVirtRegs(LDVImpl *LDV) {
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for (unsigned i = 0, e = locations.size(); i != e; ++i)
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if (locations[i].isReg() &&
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TargetRegisterInfo::isVirtualRegister(locations[i].getReg()))
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LDV->mapVirtReg(locations[i].getReg(), this);
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}
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UserValue *LDVImpl::getUserValue(const DILocalVariable *Var,
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const DIExpression *Expr, const DebugLoc &DL) {
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UserValue *&Leader = userVarMap[Var];
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if (Leader) {
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UserValue *UV = Leader->getLeader();
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Leader = UV;
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for (; UV; UV = UV->getNext())
|
|
if (UV->match(Var, Expr, DL->getInlinedAt()))
|
|
return UV;
|
|
}
|
|
|
|
userValues.push_back(
|
|
llvm::make_unique<UserValue>(Var, Expr, DL, allocator));
|
|
UserValue *UV = userValues.back().get();
|
|
Leader = UserValue::merge(Leader, UV);
|
|
return UV;
|
|
}
|
|
|
|
void LDVImpl::mapVirtReg(unsigned VirtReg, UserValue *EC) {
|
|
assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && "Only map VirtRegs");
|
|
UserValue *&Leader = virtRegToEqClass[VirtReg];
|
|
Leader = UserValue::merge(Leader, EC);
|
|
}
|
|
|
|
UserValue *LDVImpl::lookupVirtReg(unsigned VirtReg) {
|
|
if (UserValue *UV = virtRegToEqClass.lookup(VirtReg))
|
|
return UV->getLeader();
|
|
return nullptr;
|
|
}
|
|
|
|
bool LDVImpl::handleDebugValue(MachineInstr &MI, SlotIndex Idx) {
|
|
// DBG_VALUE loc, offset, variable
|
|
if (MI.getNumOperands() != 4 ||
|
|
!(MI.getOperand(1).isReg() || MI.getOperand(1).isImm()) ||
|
|
!MI.getOperand(2).isMetadata()) {
|
|
DEBUG(dbgs() << "Can't handle " << MI);
|
|
return false;
|
|
}
|
|
|
|
// Get or create the UserValue for (variable,offset) here.
|
|
bool IsIndirect = MI.getOperand(1).isImm();
|
|
if (IsIndirect)
|
|
assert(MI.getOperand(1).getImm() == 0 && "DBG_VALUE with nonzero offset");
|
|
const DILocalVariable *Var = MI.getDebugVariable();
|
|
const DIExpression *Expr = MI.getDebugExpression();
|
|
UserValue *UV =
|
|
getUserValue(Var, Expr, MI.getDebugLoc());
|
|
UV->addDef(Idx, MI.getOperand(0), IsIndirect);
|
|
return true;
|
|
}
|
|
|
|
bool LDVImpl::collectDebugValues(MachineFunction &mf) {
|
|
bool Changed = false;
|
|
for (MachineFunction::iterator MFI = mf.begin(), MFE = mf.end(); MFI != MFE;
|
|
++MFI) {
|
|
MachineBasicBlock *MBB = &*MFI;
|
|
for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
|
|
MBBI != MBBE;) {
|
|
if (!MBBI->isDebugValue()) {
|
|
++MBBI;
|
|
continue;
|
|
}
|
|
// DBG_VALUE has no slot index, use the previous instruction instead.
|
|
SlotIndex Idx =
|
|
MBBI == MBB->begin()
|
|
? LIS->getMBBStartIdx(MBB)
|
|
: LIS->getInstructionIndex(*std::prev(MBBI)).getRegSlot();
|
|
// Handle consecutive DBG_VALUE instructions with the same slot index.
|
|
do {
|
|
if (handleDebugValue(*MBBI, Idx)) {
|
|
MBBI = MBB->erase(MBBI);
|
|
Changed = true;
|
|
} else
|
|
++MBBI;
|
|
} while (MBBI != MBBE && MBBI->isDebugValue());
|
|
}
|
|
}
|
|
return Changed;
|
|
}
|
|
|
|
/// We only propagate DBG_VALUES locally here. LiveDebugValues performs a
|
|
/// data-flow analysis to propagate them beyond basic block boundaries.
|
|
void UserValue::extendDef(SlotIndex Idx, DbgValueLocation Loc, LiveRange *LR,
|
|
const VNInfo *VNI, SmallVectorImpl<SlotIndex> *Kills,
|
|
LiveIntervals &LIS) {
|
|
SlotIndex Start = Idx;
|
|
MachineBasicBlock *MBB = LIS.getMBBFromIndex(Start);
|
|
SlotIndex Stop = LIS.getMBBEndIdx(MBB);
|
|
LocMap::iterator I = locInts.find(Start);
|
|
|
|
// Limit to VNI's live range.
|
|
bool ToEnd = true;
|
|
if (LR && VNI) {
|
|
LiveInterval::Segment *Segment = LR->getSegmentContaining(Start);
|
|
if (!Segment || Segment->valno != VNI) {
|
|
if (Kills)
|
|
Kills->push_back(Start);
|
|
return;
|
|
}
|
|
if (Segment->end < Stop) {
|
|
Stop = Segment->end;
|
|
ToEnd = false;
|
|
}
|
|
}
|
|
|
|
// There could already be a short def at Start.
|
|
if (I.valid() && I.start() <= Start) {
|
|
// Stop when meeting a different location or an already extended interval.
|
|
Start = Start.getNextSlot();
|
|
if (I.value() != Loc || I.stop() != Start)
|
|
return;
|
|
// This is a one-slot placeholder. Just skip it.
|
|
++I;
|
|
}
|
|
|
|
// Limited by the next def.
|
|
if (I.valid() && I.start() < Stop) {
|
|
Stop = I.start();
|
|
ToEnd = false;
|
|
}
|
|
// Limited by VNI's live range.
|
|
else if (!ToEnd && Kills)
|
|
Kills->push_back(Stop);
|
|
|
|
if (Start < Stop)
|
|
I.insert(Start, Stop, Loc);
|
|
}
|
|
|
|
void UserValue::addDefsFromCopies(
|
|
LiveInterval *LI, unsigned LocNo, bool WasIndirect,
|
|
const SmallVectorImpl<SlotIndex> &Kills,
|
|
SmallVectorImpl<std::pair<SlotIndex, DbgValueLocation>> &NewDefs,
|
|
MachineRegisterInfo &MRI, LiveIntervals &LIS) {
|
|
if (Kills.empty())
|
|
return;
|
|
// Don't track copies from physregs, there are too many uses.
|
|
if (!TargetRegisterInfo::isVirtualRegister(LI->reg))
|
|
return;
|
|
|
|
// Collect all the (vreg, valno) pairs that are copies of LI.
|
|
SmallVector<std::pair<LiveInterval*, const VNInfo*>, 8> CopyValues;
|
|
for (MachineOperand &MO : MRI.use_nodbg_operands(LI->reg)) {
|
|
MachineInstr *MI = MO.getParent();
|
|
// Copies of the full value.
|
|
if (MO.getSubReg() || !MI->isCopy())
|
|
continue;
|
|
unsigned DstReg = MI->getOperand(0).getReg();
|
|
|
|
// Don't follow copies to physregs. These are usually setting up call
|
|
// arguments, and the argument registers are always call clobbered. We are
|
|
// better off in the source register which could be a callee-saved register,
|
|
// or it could be spilled.
|
|
if (!TargetRegisterInfo::isVirtualRegister(DstReg))
|
|
continue;
|
|
|
|
// Is LocNo extended to reach this copy? If not, another def may be blocking
|
|
// it, or we are looking at a wrong value of LI.
|
|
SlotIndex Idx = LIS.getInstructionIndex(*MI);
|
|
LocMap::iterator I = locInts.find(Idx.getRegSlot(true));
|
|
if (!I.valid() || I.value().locNo() != LocNo)
|
|
continue;
|
|
|
|
if (!LIS.hasInterval(DstReg))
|
|
continue;
|
|
LiveInterval *DstLI = &LIS.getInterval(DstReg);
|
|
const VNInfo *DstVNI = DstLI->getVNInfoAt(Idx.getRegSlot());
|
|
assert(DstVNI && DstVNI->def == Idx.getRegSlot() && "Bad copy value");
|
|
CopyValues.push_back(std::make_pair(DstLI, DstVNI));
|
|
}
|
|
|
|
if (CopyValues.empty())
|
|
return;
|
|
|
|
DEBUG(dbgs() << "Got " << CopyValues.size() << " copies of " << *LI << '\n');
|
|
|
|
// Try to add defs of the copied values for each kill point.
|
|
for (unsigned i = 0, e = Kills.size(); i != e; ++i) {
|
|
SlotIndex Idx = Kills[i];
|
|
for (unsigned j = 0, e = CopyValues.size(); j != e; ++j) {
|
|
LiveInterval *DstLI = CopyValues[j].first;
|
|
const VNInfo *DstVNI = CopyValues[j].second;
|
|
if (DstLI->getVNInfoAt(Idx) != DstVNI)
|
|
continue;
|
|
// Check that there isn't already a def at Idx
|
|
LocMap::iterator I = locInts.find(Idx);
|
|
if (I.valid() && I.start() <= Idx)
|
|
continue;
|
|
DEBUG(dbgs() << "Kill at " << Idx << " covered by valno #"
|
|
<< DstVNI->id << " in " << *DstLI << '\n');
|
|
MachineInstr *CopyMI = LIS.getInstructionFromIndex(DstVNI->def);
|
|
assert(CopyMI && CopyMI->isCopy() && "Bad copy value");
|
|
unsigned LocNo = getLocationNo(CopyMI->getOperand(0));
|
|
DbgValueLocation NewLoc(LocNo, WasIndirect);
|
|
I.insert(Idx, Idx.getNextSlot(), NewLoc);
|
|
NewDefs.push_back(std::make_pair(Idx, NewLoc));
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
void UserValue::computeIntervals(MachineRegisterInfo &MRI,
|
|
const TargetRegisterInfo &TRI,
|
|
LiveIntervals &LIS, LexicalScopes &LS) {
|
|
SmallVector<std::pair<SlotIndex, DbgValueLocation>, 16> Defs;
|
|
|
|
// Collect all defs to be extended (Skipping undefs).
|
|
for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I)
|
|
if (!I.value().isUndef())
|
|
Defs.push_back(std::make_pair(I.start(), I.value()));
|
|
|
|
// Extend all defs, and possibly add new ones along the way.
|
|
for (unsigned i = 0; i != Defs.size(); ++i) {
|
|
SlotIndex Idx = Defs[i].first;
|
|
DbgValueLocation Loc = Defs[i].second;
|
|
const MachineOperand &LocMO = locations[Loc.locNo()];
|
|
|
|
if (!LocMO.isReg()) {
|
|
extendDef(Idx, Loc, nullptr, nullptr, nullptr, LIS);
|
|
continue;
|
|
}
|
|
|
|
// Register locations are constrained to where the register value is live.
|
|
if (TargetRegisterInfo::isVirtualRegister(LocMO.getReg())) {
|
|
LiveInterval *LI = nullptr;
|
|
const VNInfo *VNI = nullptr;
|
|
if (LIS.hasInterval(LocMO.getReg())) {
|
|
LI = &LIS.getInterval(LocMO.getReg());
|
|
VNI = LI->getVNInfoAt(Idx);
|
|
}
|
|
SmallVector<SlotIndex, 16> Kills;
|
|
extendDef(Idx, Loc, LI, VNI, &Kills, LIS);
|
|
if (LI)
|
|
addDefsFromCopies(LI, Loc.locNo(), Loc.wasIndirect(), Kills, Defs, MRI,
|
|
LIS);
|
|
continue;
|
|
}
|
|
|
|
// For physregs, we only mark the start slot idx. DwarfDebug will see it
|
|
// as if the DBG_VALUE is valid up until the end of the basic block, or
|
|
// the next def of the physical register. So we do not need to extend the
|
|
// range. It might actually happen that the DBG_VALUE is the last use of
|
|
// the physical register (e.g. if this is an unused input argument to a
|
|
// function).
|
|
}
|
|
|
|
// Erase all the undefs.
|
|
for (LocMap::iterator I = locInts.begin(); I.valid();)
|
|
if (I.value().isUndef())
|
|
I.erase();
|
|
else
|
|
++I;
|
|
|
|
// The computed intervals may extend beyond the range of the debug
|
|
// location's lexical scope. In this case, splitting of an interval
|
|
// can result in an interval outside of the scope being created,
|
|
// causing extra unnecessary DBG_VALUEs to be emitted. To prevent
|
|
// this, trim the intervals to the lexical scope.
|
|
|
|
LexicalScope *Scope = LS.findLexicalScope(dl);
|
|
if (!Scope)
|
|
return;
|
|
|
|
SlotIndex PrevEnd;
|
|
LocMap::iterator I = locInts.begin();
|
|
|
|
// Iterate over the lexical scope ranges. Each time round the loop
|
|
// we check the intervals for overlap with the end of the previous
|
|
// range and the start of the next. The first range is handled as
|
|
// a special case where there is no PrevEnd.
|
|
for (const InsnRange &Range : Scope->getRanges()) {
|
|
SlotIndex RStart = LIS.getInstructionIndex(*Range.first);
|
|
SlotIndex REnd = LIS.getInstructionIndex(*Range.second);
|
|
|
|
// At the start of each iteration I has been advanced so that
|
|
// I.stop() >= PrevEnd. Check for overlap.
|
|
if (PrevEnd && I.start() < PrevEnd) {
|
|
SlotIndex IStop = I.stop();
|
|
DbgValueLocation Loc = I.value();
|
|
|
|
// Stop overlaps previous end - trim the end of the interval to
|
|
// the scope range.
|
|
I.setStopUnchecked(PrevEnd);
|
|
++I;
|
|
|
|
// If the interval also overlaps the start of the "next" (i.e.
|
|
// current) range create a new interval for the remainder (which
|
|
// may be further trimmed).
|
|
if (RStart < IStop)
|
|
I.insert(RStart, IStop, Loc);
|
|
}
|
|
|
|
// Advance I so that I.stop() >= RStart, and check for overlap.
|
|
I.advanceTo(RStart);
|
|
if (!I.valid())
|
|
return;
|
|
|
|
if (I.start() < RStart) {
|
|
// Interval start overlaps range - trim to the scope range.
|
|
I.setStartUnchecked(RStart);
|
|
// Remember that this interval was trimmed.
|
|
trimmedDefs.insert(RStart);
|
|
}
|
|
|
|
// The end of a lexical scope range is the last instruction in the
|
|
// range. To convert to an interval we need the index of the
|
|
// instruction after it.
|
|
REnd = REnd.getNextIndex();
|
|
|
|
// Advance I to first interval outside current range.
|
|
I.advanceTo(REnd);
|
|
if (!I.valid())
|
|
return;
|
|
|
|
PrevEnd = REnd;
|
|
}
|
|
|
|
// Check for overlap with end of final range.
|
|
if (PrevEnd && I.start() < PrevEnd)
|
|
I.setStopUnchecked(PrevEnd);
|
|
}
|
|
|
|
void LDVImpl::computeIntervals() {
|
|
LexicalScopes LS;
|
|
LS.initialize(*MF);
|
|
|
|
for (unsigned i = 0, e = userValues.size(); i != e; ++i) {
|
|
userValues[i]->computeIntervals(MF->getRegInfo(), *TRI, *LIS, LS);
|
|
userValues[i]->mapVirtRegs(this);
|
|
}
|
|
}
|
|
|
|
bool LDVImpl::runOnMachineFunction(MachineFunction &mf) {
|
|
clear();
|
|
MF = &mf;
|
|
LIS = &pass.getAnalysis<LiveIntervals>();
|
|
TRI = mf.getSubtarget().getRegisterInfo();
|
|
DEBUG(dbgs() << "********** COMPUTING LIVE DEBUG VARIABLES: "
|
|
<< mf.getName() << " **********\n");
|
|
|
|
bool Changed = collectDebugValues(mf);
|
|
computeIntervals();
|
|
DEBUG(print(dbgs()));
|
|
ModifiedMF = Changed;
|
|
return Changed;
|
|
}
|
|
|
|
static void removeDebugValues(MachineFunction &mf) {
|
|
for (MachineBasicBlock &MBB : mf) {
|
|
for (auto MBBI = MBB.begin(), MBBE = MBB.end(); MBBI != MBBE; ) {
|
|
if (!MBBI->isDebugValue()) {
|
|
++MBBI;
|
|
continue;
|
|
}
|
|
MBBI = MBB.erase(MBBI);
|
|
}
|
|
}
|
|
}
|
|
|
|
bool LiveDebugVariables::runOnMachineFunction(MachineFunction &mf) {
|
|
if (!EnableLDV)
|
|
return false;
|
|
if (!mf.getFunction().getSubprogram()) {
|
|
removeDebugValues(mf);
|
|
return false;
|
|
}
|
|
if (!pImpl)
|
|
pImpl = new LDVImpl(this);
|
|
return static_cast<LDVImpl*>(pImpl)->runOnMachineFunction(mf);
|
|
}
|
|
|
|
void LiveDebugVariables::releaseMemory() {
|
|
if (pImpl)
|
|
static_cast<LDVImpl*>(pImpl)->clear();
|
|
}
|
|
|
|
LiveDebugVariables::~LiveDebugVariables() {
|
|
if (pImpl)
|
|
delete static_cast<LDVImpl*>(pImpl);
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Live Range Splitting
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
bool
|
|
UserValue::splitLocation(unsigned OldLocNo, ArrayRef<unsigned> NewRegs,
|
|
LiveIntervals& LIS) {
|
|
DEBUG({
|
|
dbgs() << "Splitting Loc" << OldLocNo << '\t';
|
|
print(dbgs(), nullptr);
|
|
});
|
|
bool DidChange = false;
|
|
LocMap::iterator LocMapI;
|
|
LocMapI.setMap(locInts);
|
|
for (unsigned i = 0; i != NewRegs.size(); ++i) {
|
|
LiveInterval *LI = &LIS.getInterval(NewRegs[i]);
|
|
if (LI->empty())
|
|
continue;
|
|
|
|
// Don't allocate the new LocNo until it is needed.
|
|
unsigned NewLocNo = UndefLocNo;
|
|
|
|
// Iterate over the overlaps between locInts and LI.
|
|
LocMapI.find(LI->beginIndex());
|
|
if (!LocMapI.valid())
|
|
continue;
|
|
LiveInterval::iterator LII = LI->advanceTo(LI->begin(), LocMapI.start());
|
|
LiveInterval::iterator LIE = LI->end();
|
|
while (LocMapI.valid() && LII != LIE) {
|
|
// At this point, we know that LocMapI.stop() > LII->start.
|
|
LII = LI->advanceTo(LII, LocMapI.start());
|
|
if (LII == LIE)
|
|
break;
|
|
|
|
// Now LII->end > LocMapI.start(). Do we have an overlap?
|
|
if (LocMapI.value().locNo() == OldLocNo && LII->start < LocMapI.stop()) {
|
|
// Overlapping correct location. Allocate NewLocNo now.
|
|
if (NewLocNo == UndefLocNo) {
|
|
MachineOperand MO = MachineOperand::CreateReg(LI->reg, false);
|
|
MO.setSubReg(locations[OldLocNo].getSubReg());
|
|
NewLocNo = getLocationNo(MO);
|
|
DidChange = true;
|
|
}
|
|
|
|
SlotIndex LStart = LocMapI.start();
|
|
SlotIndex LStop = LocMapI.stop();
|
|
DbgValueLocation OldLoc = LocMapI.value();
|
|
|
|
// Trim LocMapI down to the LII overlap.
|
|
if (LStart < LII->start)
|
|
LocMapI.setStartUnchecked(LII->start);
|
|
if (LStop > LII->end)
|
|
LocMapI.setStopUnchecked(LII->end);
|
|
|
|
// Change the value in the overlap. This may trigger coalescing.
|
|
LocMapI.setValue(OldLoc.changeLocNo(NewLocNo));
|
|
|
|
// Re-insert any removed OldLocNo ranges.
|
|
if (LStart < LocMapI.start()) {
|
|
LocMapI.insert(LStart, LocMapI.start(), OldLoc);
|
|
++LocMapI;
|
|
assert(LocMapI.valid() && "Unexpected coalescing");
|
|
}
|
|
if (LStop > LocMapI.stop()) {
|
|
++LocMapI;
|
|
LocMapI.insert(LII->end, LStop, OldLoc);
|
|
--LocMapI;
|
|
}
|
|
}
|
|
|
|
// Advance to the next overlap.
|
|
if (LII->end < LocMapI.stop()) {
|
|
if (++LII == LIE)
|
|
break;
|
|
LocMapI.advanceTo(LII->start);
|
|
} else {
|
|
++LocMapI;
|
|
if (!LocMapI.valid())
|
|
break;
|
|
LII = LI->advanceTo(LII, LocMapI.start());
|
|
}
|
|
}
|
|
}
|
|
|
|
// Finally, remove any remaining OldLocNo intervals and OldLocNo itself.
|
|
locations.erase(locations.begin() + OldLocNo);
|
|
LocMapI.goToBegin();
|
|
while (LocMapI.valid()) {
|
|
DbgValueLocation v = LocMapI.value();
|
|
if (v.locNo() == OldLocNo) {
|
|
DEBUG(dbgs() << "Erasing [" << LocMapI.start() << ';'
|
|
<< LocMapI.stop() << ")\n");
|
|
LocMapI.erase();
|
|
} else {
|
|
if (v.locNo() > OldLocNo)
|
|
LocMapI.setValueUnchecked(v.changeLocNo(v.locNo() - 1));
|
|
++LocMapI;
|
|
}
|
|
}
|
|
|
|
DEBUG({dbgs() << "Split result: \t"; print(dbgs(), nullptr);});
|
|
return DidChange;
|
|
}
|
|
|
|
bool
|
|
UserValue::splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs,
|
|
LiveIntervals &LIS) {
|
|
bool DidChange = false;
|
|
// Split locations referring to OldReg. Iterate backwards so splitLocation can
|
|
// safely erase unused locations.
|
|
for (unsigned i = locations.size(); i ; --i) {
|
|
unsigned LocNo = i-1;
|
|
const MachineOperand *Loc = &locations[LocNo];
|
|
if (!Loc->isReg() || Loc->getReg() != OldReg)
|
|
continue;
|
|
DidChange |= splitLocation(LocNo, NewRegs, LIS);
|
|
}
|
|
return DidChange;
|
|
}
|
|
|
|
void LDVImpl::splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs) {
|
|
bool DidChange = false;
|
|
for (UserValue *UV = lookupVirtReg(OldReg); UV; UV = UV->getNext())
|
|
DidChange |= UV->splitRegister(OldReg, NewRegs, *LIS);
|
|
|
|
if (!DidChange)
|
|
return;
|
|
|
|
// Map all of the new virtual registers.
|
|
UserValue *UV = lookupVirtReg(OldReg);
|
|
for (unsigned i = 0; i != NewRegs.size(); ++i)
|
|
mapVirtReg(NewRegs[i], UV);
|
|
}
|
|
|
|
void LiveDebugVariables::
|
|
splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) {
|
|
if (pImpl)
|
|
static_cast<LDVImpl*>(pImpl)->splitRegister(OldReg, NewRegs);
|
|
}
|
|
|
|
void UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI,
|
|
BitVector &SpilledLocations) {
|
|
// Build a set of new locations with new numbers so we can coalesce our
|
|
// IntervalMap if two vreg intervals collapse to the same physical location.
|
|
// Use MapVector instead of SetVector because MapVector::insert returns the
|
|
// position of the previously or newly inserted element. The boolean value
|
|
// tracks if the location was produced by a spill.
|
|
// FIXME: This will be problematic if we ever support direct and indirect
|
|
// frame index locations, i.e. expressing both variables in memory and
|
|
// 'int x, *px = &x'. The "spilled" bit must become part of the location.
|
|
MapVector<MachineOperand, bool> NewLocations;
|
|
SmallVector<unsigned, 4> LocNoMap(locations.size());
|
|
for (unsigned I = 0, E = locations.size(); I != E; ++I) {
|
|
bool Spilled = false;
|
|
MachineOperand Loc = locations[I];
|
|
// Only virtual registers are rewritten.
|
|
if (Loc.isReg() && Loc.getReg() &&
|
|
TargetRegisterInfo::isVirtualRegister(Loc.getReg())) {
|
|
unsigned VirtReg = Loc.getReg();
|
|
if (VRM.isAssignedReg(VirtReg) &&
|
|
TargetRegisterInfo::isPhysicalRegister(VRM.getPhys(VirtReg))) {
|
|
// This can create a %noreg operand in rare cases when the sub-register
|
|
// index is no longer available. That means the user value is in a
|
|
// non-existent sub-register, and %noreg is exactly what we want.
|
|
Loc.substPhysReg(VRM.getPhys(VirtReg), TRI);
|
|
} else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) {
|
|
// FIXME: Translate SubIdx to a stackslot offset.
|
|
Loc = MachineOperand::CreateFI(VRM.getStackSlot(VirtReg));
|
|
Spilled = true;
|
|
} else {
|
|
Loc.setReg(0);
|
|
Loc.setSubReg(0);
|
|
}
|
|
}
|
|
|
|
// Insert this location if it doesn't already exist and record a mapping
|
|
// from the old number to the new number.
|
|
auto InsertResult = NewLocations.insert({Loc, Spilled});
|
|
unsigned NewLocNo = std::distance(NewLocations.begin(), InsertResult.first);
|
|
LocNoMap[I] = NewLocNo;
|
|
}
|
|
|
|
// Rewrite the locations and record which ones were spill slots.
|
|
locations.clear();
|
|
SpilledLocations.clear();
|
|
SpilledLocations.resize(NewLocations.size());
|
|
for (auto &Pair : NewLocations) {
|
|
locations.push_back(Pair.first);
|
|
if (Pair.second) {
|
|
unsigned NewLocNo = std::distance(&*NewLocations.begin(), &Pair);
|
|
SpilledLocations.set(NewLocNo);
|
|
}
|
|
}
|
|
|
|
// Update the interval map, but only coalesce left, since intervals to the
|
|
// right use the old location numbers. This should merge two contiguous
|
|
// DBG_VALUE intervals with different vregs that were allocated to the same
|
|
// physical register.
|
|
for (LocMap::iterator I = locInts.begin(); I.valid(); ++I) {
|
|
DbgValueLocation Loc = I.value();
|
|
unsigned NewLocNo = LocNoMap[Loc.locNo()];
|
|
I.setValueUnchecked(Loc.changeLocNo(NewLocNo));
|
|
I.setStart(I.start());
|
|
}
|
|
}
|
|
|
|
/// Find an iterator for inserting a DBG_VALUE instruction.
|
|
static MachineBasicBlock::iterator
|
|
findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx,
|
|
LiveIntervals &LIS) {
|
|
SlotIndex Start = LIS.getMBBStartIdx(MBB);
|
|
Idx = Idx.getBaseIndex();
|
|
|
|
// Try to find an insert location by going backwards from Idx.
|
|
MachineInstr *MI;
|
|
while (!(MI = LIS.getInstructionFromIndex(Idx))) {
|
|
// We've reached the beginning of MBB.
|
|
if (Idx == Start) {
|
|
MachineBasicBlock::iterator I = MBB->SkipPHIsLabelsAndDebug(MBB->begin());
|
|
return I;
|
|
}
|
|
Idx = Idx.getPrevIndex();
|
|
}
|
|
|
|
// Don't insert anything after the first terminator, though.
|
|
return MI->isTerminator() ? MBB->getFirstTerminator() :
|
|
std::next(MachineBasicBlock::iterator(MI));
|
|
}
|
|
|
|
/// Find an iterator for inserting the next DBG_VALUE instruction
|
|
/// (or end if no more insert locations found).
|
|
static MachineBasicBlock::iterator
|
|
findNextInsertLocation(MachineBasicBlock *MBB,
|
|
MachineBasicBlock::iterator I,
|
|
SlotIndex StopIdx, MachineOperand &LocMO,
|
|
LiveIntervals &LIS,
|
|
const TargetRegisterInfo &TRI) {
|
|
if (!LocMO.isReg())
|
|
return MBB->instr_end();
|
|
unsigned Reg = LocMO.getReg();
|
|
|
|
// Find the next instruction in the MBB that define the register Reg.
|
|
while (I != MBB->end()) {
|
|
if (!LIS.isNotInMIMap(*I) &&
|
|
SlotIndex::isEarlierEqualInstr(StopIdx, LIS.getInstructionIndex(*I)))
|
|
break;
|
|
if (I->definesRegister(Reg, &TRI))
|
|
// The insert location is directly after the instruction/bundle.
|
|
return std::next(I);
|
|
++I;
|
|
}
|
|
return MBB->end();
|
|
}
|
|
|
|
void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex StartIdx,
|
|
SlotIndex StopIdx,
|
|
DbgValueLocation Loc, bool Spilled,
|
|
LiveIntervals &LIS,
|
|
const TargetInstrInfo &TII,
|
|
const TargetRegisterInfo &TRI) {
|
|
SlotIndex MBBEndIdx = LIS.getMBBEndIdx(&*MBB);
|
|
// Only search within the current MBB.
|
|
StopIdx = (MBBEndIdx < StopIdx) ? MBBEndIdx : StopIdx;
|
|
MachineBasicBlock::iterator I = findInsertLocation(MBB, StartIdx, LIS);
|
|
MachineOperand &MO = locations[Loc.locNo()];
|
|
++NumInsertedDebugValues;
|
|
|
|
assert(cast<DILocalVariable>(Variable)
|
|
->isValidLocationForIntrinsic(getDebugLoc()) &&
|
|
"Expected inlined-at fields to agree");
|
|
|
|
// If the location was spilled, the new DBG_VALUE will be indirect. If the
|
|
// original DBG_VALUE was indirect, we need to add DW_OP_deref to indicate
|
|
// that the original virtual register was a pointer.
|
|
const DIExpression *Expr = Expression;
|
|
bool IsIndirect = Loc.wasIndirect();
|
|
if (Spilled) {
|
|
if (IsIndirect)
|
|
Expr = DIExpression::prepend(Expr, DIExpression::WithDeref);
|
|
IsIndirect = true;
|
|
}
|
|
|
|
assert((!Spilled || MO.isFI()) && "a spilled location must be a frame index");
|
|
|
|
do {
|
|
MachineInstrBuilder MIB =
|
|
BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
|
|
.add(MO);
|
|
if (IsIndirect)
|
|
MIB.addImm(0U);
|
|
else
|
|
MIB.addReg(0U, RegState::Debug);
|
|
MIB.addMetadata(Variable).addMetadata(Expr);
|
|
|
|
// Continue and insert DBG_VALUES after every redefinition of register
|
|
// associated with the debug value within the range
|
|
I = findNextInsertLocation(MBB, I, StopIdx, MO, LIS, TRI);
|
|
} while (I != MBB->end());
|
|
}
|
|
|
|
void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
|
|
const TargetInstrInfo &TII,
|
|
const TargetRegisterInfo &TRI,
|
|
const BitVector &SpilledLocations) {
|
|
MachineFunction::iterator MFEnd = VRM->getMachineFunction().end();
|
|
|
|
for (LocMap::const_iterator I = locInts.begin(); I.valid();) {
|
|
SlotIndex Start = I.start();
|
|
SlotIndex Stop = I.stop();
|
|
DbgValueLocation Loc = I.value();
|
|
bool Spilled = !Loc.isUndef() ? SpilledLocations.test(Loc.locNo()) : false;
|
|
|
|
// If the interval start was trimmed to the lexical scope insert the
|
|
// DBG_VALUE at the previous index (otherwise it appears after the
|
|
// first instruction in the range).
|
|
if (trimmedDefs.count(Start))
|
|
Start = Start.getPrevIndex();
|
|
|
|
DEBUG(dbgs() << "\t[" << Start << ';' << Stop << "):" << Loc.locNo());
|
|
MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator();
|
|
SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB);
|
|
|
|
DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd);
|
|
insertDebugValue(&*MBB, Start, Stop, Loc, Spilled, LIS, TII, TRI);
|
|
// This interval may span multiple basic blocks.
|
|
// Insert a DBG_VALUE into each one.
|
|
while (Stop > MBBEnd) {
|
|
// Move to the next block.
|
|
Start = MBBEnd;
|
|
if (++MBB == MFEnd)
|
|
break;
|
|
MBBEnd = LIS.getMBBEndIdx(&*MBB);
|
|
DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd);
|
|
insertDebugValue(&*MBB, Start, Stop, Loc, Spilled, LIS, TII, TRI);
|
|
}
|
|
DEBUG(dbgs() << '\n');
|
|
if (MBB == MFEnd)
|
|
break;
|
|
|
|
++I;
|
|
}
|
|
}
|
|
|
|
void LDVImpl::emitDebugValues(VirtRegMap *VRM) {
|
|
DEBUG(dbgs() << "********** EMITTING LIVE DEBUG VARIABLES **********\n");
|
|
if (!MF)
|
|
return;
|
|
const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
|
|
BitVector SpilledLocations;
|
|
for (unsigned i = 0, e = userValues.size(); i != e; ++i) {
|
|
DEBUG(userValues[i]->print(dbgs(), TRI));
|
|
userValues[i]->rewriteLocations(*VRM, *TRI, SpilledLocations);
|
|
userValues[i]->emitDebugValues(VRM, *LIS, *TII, *TRI, SpilledLocations);
|
|
}
|
|
EmitDone = true;
|
|
}
|
|
|
|
void LiveDebugVariables::emitDebugValues(VirtRegMap *VRM) {
|
|
if (pImpl)
|
|
static_cast<LDVImpl*>(pImpl)->emitDebugValues(VRM);
|
|
}
|
|
|
|
bool LiveDebugVariables::doInitialization(Module &M) {
|
|
return Pass::doInitialization(M);
|
|
}
|
|
|
|
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
|
|
LLVM_DUMP_METHOD void LiveDebugVariables::dump() const {
|
|
if (pImpl)
|
|
static_cast<LDVImpl*>(pImpl)->print(dbgs());
|
|
}
|
|
#endif
|