forked from OSchip/llvm-project
27 lines
753 B
LLVM
27 lines
753 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV64ZBB
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declare i32 @llvm.riscv.orc.b.i32(i32)
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define signext i32 @orcb32(i32 signext %a) nounwind {
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; RV64ZBB-LABEL: orcb32:
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; RV64ZBB: # %bb.0:
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; RV64ZBB-NEXT: orc.b a0, a0
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; RV64ZBB-NEXT: sext.w a0, a0
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; RV64ZBB-NEXT: ret
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%tmp = call i32 @llvm.riscv.orc.b.i32(i32 %a)
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ret i32 %tmp
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}
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declare i64 @llvm.riscv.orc.b.i64(i64)
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define i64 @orcb64(i64 %a) nounwind {
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; RV64ZBB-LABEL: orcb64:
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; RV64ZBB: # %bb.0:
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; RV64ZBB-NEXT: orc.b a0, a0
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; RV64ZBB-NEXT: ret
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%tmp = call i64 @llvm.riscv.orc.b.i64(i64 %a)
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ret i64 %tmp
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}
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