forked from OSchip/llvm-project
38 lines
1.4 KiB
LLVM
38 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64I %s
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; The test cases check that we use the si versions of the conversions from
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; double.
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declare i32 @llvm.experimental.constrained.fptoui.i32.f32(float, metadata)
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declare i32 @llvm.experimental.constrained.fptosi.i32.f32(float, metadata)
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define i32 @strict_fp32_to_ui32(float %a) nounwind strictfp {
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; RV64I-LABEL: strict_fp32_to_ui32:
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; RV64I: # %bb.0: # %entry
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: call __fixunssfsi@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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entry:
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%conv = tail call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %a, metadata !"fpexcept.strict")
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ret i32 %conv
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}
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define i32 @strict_fp32_to_si32(float %a) nounwind strictfp {
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; RV64I-LABEL: strict_fp32_to_si32:
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; RV64I: # %bb.0: # %entry
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; RV64I-NEXT: addi sp, sp, -16
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; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: call __fixsfsi@plt
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; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 16
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; RV64I-NEXT: ret
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entry:
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%conv = tail call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %a, metadata !"fpexcept.strict")
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ret i32 %conv
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}
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