forked from OSchip/llvm-project
83 lines
2.9 KiB
LLVM
83 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i32 @sterix(i32, i8, i64) {
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; CHECK-LABEL: @sterix(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[TMP0:%.*]] to i64
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; CHECK-NEXT: [[CONV1:%.*]] = sext i8 [[TMP1:%.*]] to i32
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; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[CONV1]], 1945964878
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; CHECK-NEXT: [[SH_PROM:%.*]] = trunc i64 [[TMP2:%.*]] to i32
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; CHECK-NEXT: [[SHR:%.*]] = lshr i32 [[MUL]], [[SH_PROM]]
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; CHECK-NEXT: [[CONV2:%.*]] = zext i32 [[SHR]] to i64
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; CHECK-NEXT: [[MUL3:%.*]] = mul nuw nsw i64 [[CONV]], [[CONV2]]
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; CHECK-NEXT: [[CONV6:%.*]] = and i64 [[MUL3]], 4294967295
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[CONV6]], [[MUL3]]
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[LOR_RHS:%.*]], label [[LOR_END:%.*]]
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; CHECK: lor.rhs:
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; CHECK-NEXT: [[AND:%.*]] = and i64 [[MUL3]], [[TMP2]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i64 [[AND]] to i32
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; CHECK-NEXT: [[TOBOOL7:%.*]] = icmp eq i32 [[CONV4]], 0
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; CHECK-NEXT: [[PHITMP:%.*]] = zext i1 [[TOBOOL7]] to i32
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; CHECK-NEXT: br label [[LOR_END]]
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; CHECK: lor.end:
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; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[PHITMP]], [[LOR_RHS]] ]
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; CHECK-NEXT: ret i32 [[TMP3]]
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;
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entry:
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%conv = zext i32 %0 to i64
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%conv1 = sext i8 %1 to i32
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%mul = mul i32 %conv1, 1945964878
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%sh_prom = trunc i64 %2 to i32
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%shr = lshr i32 %mul, %sh_prom
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%conv2 = zext i32 %shr to i64
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%mul3 = mul nuw nsw i64 %conv, %conv2
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%conv6 = and i64 %mul3, 4294967295
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%tobool = icmp ne i64 %conv6, %mul3
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br i1 %tobool, label %lor.end, label %lor.rhs
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lor.rhs:
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%and = and i64 %2, %mul3
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%conv4 = trunc i64 %and to i32
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%tobool7 = icmp ne i32 %conv4, 0
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%lnot = xor i1 %tobool7, true
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br label %lor.end
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lor.end:
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%3 = phi i1 [ true, %entry ], [ %lnot, %lor.rhs ]
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%conv8 = zext i1 %3 to i32
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ret i32 %conv8
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}
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; https://bugs.llvm.org/show_bug.cgi?id=33765
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@glob = external global i16
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define void @PR33765(i8 %beth) {
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; CHECK-LABEL: @PR33765(
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; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[BETH:%.*]] to i32
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; CHECK-NEXT: br i1 false, label [[IF_THEN9:%.*]], label [[IF_THEN9]]
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; CHECK: if.then9:
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; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[CONV]], [[CONV]]
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; CHECK-NEXT: [[TINKY:%.*]] = load i16, i16* @glob, align 2
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[MUL]] to i16
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; CHECK-NEXT: [[CONV14:%.*]] = and i16 [[TINKY]], [[TMP1]]
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; CHECK-NEXT: store i16 [[CONV14]], i16* @glob, align 2
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; CHECK-NEXT: ret void
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;
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%conv = zext i8 %beth to i32
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%mul = mul nuw nsw i32 %conv, %conv
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%conv3 = and i32 %mul, 255
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%tobool8 = icmp ne i32 %mul, %conv3
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br i1 %tobool8, label %if.then9, label %if.then9
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if.then9:
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%tinky = load i16, i16* @glob
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%conv13 = sext i16 %tinky to i32
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%and = and i32 %mul, %conv13
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%conv14 = trunc i32 %and to i16
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store i16 %conv14, i16* @glob
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ret void
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}
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