llvm-project/llvm/test/CodeGen/Hexagon/autohvx
Krzysztof Parzyszek c8bfed05e2 Reland 7691790dfd with a MSAN fix
In some cases when HexagonTargetLowering::allowsMemoryAccess returned
true, it did not set the "Fast" argument, leaving it uninitialized.

[Hexagon] Improve casting of boolean HVX vectors to scalars

- Mark memory access for bool vectors as disallowed in target lowering.
  This will prevent combining bitcasts of bool vectors with stores.
- Replace the actual bitcasting code with a faster version.
- Handle casting of v16i1 to i16.
2020-02-28 08:32:58 -06:00
..
align-64b.ll
align-128b.ll
align2-64b.ll
align2-128b.ll
arith.ll
bitcount-64b.ll
bitcount-128b.ll
bitwise-pred-64b.ll
bitwise-pred-128b.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
bswap.ll
build-vector-i32-type.ll
concat-vectors-64b.ll
concat-vectors-128b.ll
contract-64b.ll
contract-128b.ll
ctpop-split.ll
deal-64b.ll
deal-128b.ll
delta-64b.ll
delta-128b.ll
delta2-64b.ll
extract-element.ll
float-cost.ll
interleave.ll
isel-anyext-inreg.ll
isel-anyext-pair.ll
isel-bitcast-vsplat.ll
isel-bitcast-vsplat2.ll
isel-bool-vector.ll
isel-build-undef.ll
isel-concat-multiple.ll
isel-concat-vectors-bool.ll
isel-concat-vectors.ll
isel-const-splat-bitcast.ll
isel-const-splat.ll
isel-const-vector.ll
isel-expand-unaligned-loads-noindexed.ll
isel-expand-unaligned-loads.ll
isel-extractelt-illegal-type.ll
isel-hvx-pred-bitcast.ll Reland 7691790dfd with a MSAN fix 2020-02-28 08:32:58 -06:00
isel-q2v-pair.ll
isel-qfalse.ll
isel-select-const.ll
isel-setcc-pair.ll
isel-setcc-v256i1.ll
isel-sext-inreg.ll
isel-shift-byte.ll
isel-shuffle-gather.ll
isel-shuffle-pack.ll
isel-store-bitcast-v128i1.ll Reland 7691790dfd with a MSAN fix 2020-02-28 08:32:58 -06:00
isel-truncate.ll
isel-vec-ext.ll
isel-vsplat-pair.ll
lower-insert-elt.ll
maximize-bandwidth.ll
minmax-64b.ll
minmax-128b.ll
perfect-single.ll
reg-sequence.ll
shift-64b.ll
shift-128b.ll
shuff-64b.ll
shuff-128b.ll
shuff-combos-64b.ll
shuff-combos-128b.ll
shuff-single.ll
vdd0.ll
vector-compare-64b.ll
vector-compare-128b.ll
vector-predicate-typecast.ll [Hexagon] Introduce noop intrinsic to cast between vector predicate types 2020-02-21 07:37:59 -06:00
vext-64b.ll
vext-128b.ll
vmux-order.ll