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AArch64
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
AMDGPU
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AMDGPU: Add D16 instructions preserve unused bits feature
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2018-05-04 20:06:57 +00:00 |
ARM
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
AVR
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[AVR] Implement some missing code paths
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2017-12-11 11:01:27 +00:00 |
AsmParser
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[MC] Change AsmParser to leverage Assembler during evaluation
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2018-04-30 19:22:40 +00:00 |
BPF
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bpf: New disassembler testcases for 32-bit subregister support
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2018-02-23 23:49:35 +00:00 |
COFF
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
Disassembler
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[mips] Move conditional moves out of isCodeGenOnly
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2018-05-09 10:33:21 +00:00 |
ELF
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
Hexagon
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[Hexagon] Move clamping of extended operands directly to MC code emitter
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2018-05-07 17:34:23 +00:00 |
Lanai
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[lanai] Add more tests for assembly of conditional ALU ops
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2016-07-11 17:58:16 +00:00 |
MachO
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
Mips
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[mips] Move conditional moves out of isCodeGenOnly
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2018-05-09 10:33:21 +00:00 |
PowerPC
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[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.
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2018-02-23 15:55:16 +00:00 |
RISCV
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[RISCV] Allow call pseudoinstruction to be used to call a function name that coincides with a register name
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2018-04-25 17:25:29 +00:00 |
Sparc
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[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed
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2017-07-25 15:28:28 +00:00 |
SystemZ
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[SystemZ, AsmParser] Enable the mnemonic spell corrector.
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2017-07-18 09:17:00 +00:00 |
WebAssembly
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
X86
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[x86] Introduce the enclv instruction
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2018-05-08 07:11:05 +00:00 |