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Daniel Sanders 08464524c3 [ARM][GISel] PR35965 Constrain RegClasses of nested instructions built from Dst Pattern 
Summary:
Apparently, we missed on constraining register classes of VReg-operands of all the instructions
built from a destination pattern but the root (top-level) one. The issue exposed itself
while selecting G_FPTOSI for armv7: the corresponding pattern generates VTOSIZS wrapped
into COPY_TO_REGCLASS, so top-level COPY_TO_REGCLASS gets properly constrained,
while nested VTOSIZS (or rather its destination virtual register to be exact) does not.

Fixing this by issuing GIR_ConstrainSelectedInstOperands for every nested GIR_BuildMI.

https://bugs.llvm.org/show_bug.cgi?id=35965
rdar://problem/36886530

Patch by Roman Tereshin

Reviewers: dsanders, qcolombet, rovka, bogner, aditya_nandakumar, volkan

Reviewed By: dsanders, qcolombet, rovka

Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D42565

llvm-svn: 323692
 		2018-01-29 21:09:12 +00:00
..
AsmMatcherEmitter.cpp [TableGen][AsmMatcherEmitter] Generate assembler checks for tied operands 2018-01-10 10:10:56 +00:00
AsmWriterEmitter.cpp [AArch64][TableGen] Skip tied result operands for InstAlias 2017-11-20 14:36:40 +00:00
AsmWriterInst.cpp
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AsmWriterInst.h
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Attributes.cpp Remove redundant includes from utils/TableGen. 2017-12-13 21:31:13 +00:00
CMakeLists.txt TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
CTagsEmitter.cpp Revert r318822 "[llvm-tblgen] - Stop using std::string in RecordKeeper." 2017-11-23 06:52:44 +00:00
CallingConvEmitter.cpp [TableGen] Simplify CallingConvEmitter.cpp. NFC. 2017-10-16 14:52:26 +00:00
CodeEmitterGen.cpp [tablegen] Avoid creating a temporary vector in getInstructionCase 2017-07-04 06:16:53 +00:00
CodeGenDAGPatterns.cpp [TableGen] Add support of Intrinsics with multiple returns 2018-01-03 11:35:09 +00:00
CodeGenDAGPatterns.h [TableGen] Print more helpful information in case of type contradiction 2017-12-21 17:12:43 +00:00
CodeGenHwModes.cpp TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
CodeGenHwModes.h TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
CodeGenInstruction.cpp [globalisel][tablegen] Generalize pointer-type inference by introducing ptypeN. NFC 2017-11-18 00:16:44 +00:00
CodeGenInstruction.h [globalisel][tablegen] Generalize pointer-type inference by introducing ptypeN. NFC 2017-11-18 00:16:44 +00:00
CodeGenIntrinsics.h TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
CodeGenMapTable.cpp [mips] Improve diagnostics for instruction mapping 2018-01-08 16:25:40 +00:00
CodeGenRegisters.cpp [TableGen] Replace InfoByHwMode::getAsString with writeToStream 2017-09-22 18:29:37 +00:00
CodeGenRegisters.h TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
CodeGenSchedule.cpp [TableGen] Add a way of getting the number of generic opcodes without including modular CodeGen headers. 2018-01-24 22:35:11 +00:00
CodeGenSchedule.h [TableGen][NFC]Remove dead variable. 2018-01-26 13:21:43 +00:00
CodeGenTarget.cpp [TableGen] Add a way of getting the number of generic opcodes without including modular CodeGen headers. 2018-01-24 22:35:11 +00:00
CodeGenTarget.h [TableGen] Add a way of getting the number of generic opcodes without including modular CodeGen headers. 2018-01-24 22:35:11 +00:00
DAGISelEmitter.cpp Allow separation of declarations and definitions in <Target>ISelDAGToDAG.inc 2017-11-10 18:36:04 +00:00
DAGISelMatcher.cpp Remove redundant includes from utils/TableGen. 2017-12-13 21:31:13 +00:00
DAGISelMatcher.h Remove `inline` keyword from inline `classof` methods 2017-06-29 19:35:17 +00:00
DAGISelMatcherEmitter.cpp [SelectionDAG] Add a isel matcher op to check the type of node results other than result 0. 2017-11-22 07:11:01 +00:00
DAGISelMatcherGen.cpp TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
DAGISelMatcherOpt.cpp [TableGen] Use less stack in DAGISelMatcherOpt 2017-02-06 19:41:44 +00:00
DFAPacketizerEmitter.cpp Avoid int to string conversion in Twine or raw_ostream contexts. 2017-12-28 16:58:54 +00:00
DisassemblerEmitter.cpp TableGen: Use StringRef instead of const std::string& in return vals. 2016-12-04 05:48:16 +00:00
FastISelEmitter.cpp Strip trailing whitespace 2017-10-06 15:33:55 +00:00
FixedLenDecoderEmitter.cpp [tablegen] Avoid creating temporary strings 2017-07-05 20:14:54 +00:00
GlobalISelEmitter.cpp [ARM][GISel] PR35965 Constrain RegClasses of nested instructions built from Dst Pattern 2018-01-29 21:09:12 +00:00
InfoByHwMode.cpp Remove redundant includes from utils/TableGen. 2017-12-13 21:31:13 +00:00
InfoByHwMode.h [TableGen] Replace InfoByHwMode::getAsString with writeToStream 2017-09-22 18:29:37 +00:00
InstrDocsEmitter.cpp [Docs] Add tablegen backend for target opcode documentation 2017-11-14 15:35:15 +00:00
InstrInfoEmitter.cpp [Targets] Don't automatically include the scheduler class enum from *GenInstrInfo.inc with GET_INSTRINFO_ENUM. Make targets request is separately. 2017-12-13 07:26:17 +00:00
IntrinsicEmitter.cpp Avoid int to string conversion in Twine or raw_ostream contexts. 2017-12-28 16:58:54 +00:00
LLVMBuild.txt
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OptParserEmitter.cpp [Bash-autocompletion] Add support for -std= 2017-08-29 02:01:56 +00:00
PseudoLoweringEmitter.cpp TableGen: Use StringInit instead of std::string for DagInit arg names 2016-12-05 06:00:46 +00:00
RegisterBankEmitter.cpp [globalisel][regbank] Warn about MIR ambiguities when register bank/class names clash. 2017-11-01 22:13:05 +00:00
RegisterInfoEmitter.cpp Fix a bunch more layering of CodeGen headers that are in Target 2017-11-17 01:07:10 +00:00
SDNodeProperties.cpp TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
SDNodeProperties.h TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
SearchableTableEmitter.cpp Remove redundant includes from utils/TableGen. 2017-12-13 21:31:13 +00:00
SequenceToOffsetTable.h Remove usages of deprecated std::unary_function and std::binary_function. 2017-09-14 18:33:25 +00:00
SubtargetEmitter.cpp [TableGen] Improve error reporting 2017-11-21 21:33:52 +00:00
SubtargetFeatureInfo.cpp Reverting r315590; it did not include changes for llvm-tblgen, which is causing link errors for several people. 2017-10-15 14:32:27 +00:00
SubtargetFeatureInfo.h [globalisel][tablegen] Compute available feature bits correctly. 2017-04-29 17:30:09 +00:00
TableGen.cpp Remove redundant includes from utils/TableGen. 2017-12-13 21:31:13 +00:00
TableGenBackends.h [Docs] Add tablegen backend for target opcode documentation 2017-11-14 15:35:15 +00:00
Types.cpp [globalisel][tablegen] Import SelectionDAG's rule predicates and support the equivalent in GIRule. 2017-04-21 15:59:56 +00:00
Types.h Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86. 2016-11-19 13:05:44 +00:00
X86DisassemblerShared.h
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X86DisassemblerTables.cpp [X86] Fix disassembler table generation to prevent instructions tagged with 'PS' being inherited into PD/XS/XD attribute entries. 2017-10-23 16:49:26 +00:00
X86DisassemblerTables.h [X86] Fix disassembler table generation to prevent instructions tagged with 'PS' being inherited into PD/XS/XD attribute entries. 2017-10-23 16:49:26 +00:00
X86EVEX2VEXTablesEmitter.cpp [X86] Teach EVEX->VEX pass to turn SHUFI32X4/SHUFF32X4/SHUFI64X/SHUFF64X2 into VPERM2F128/VPERM2I128. 2017-11-04 18:10:03 +00:00
X86FoldTablesEmitter.cpp [X86] Don't put any EVEX_B instructions in the tablegen generated load folding tables. 2018-01-07 06:24:28 +00:00
X86ModRMFilters.cpp
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X86ModRMFilters.h fix trivial typos in comments; NFC 2017-07-04 13:09:29 +00:00
X86RecognizableInstr.cpp [X86] Revisit the fix I made years ago to make 'xchgl %eax, %eax' not encode using the 0x90 encoding in 64-bit mode. 2018-01-16 06:07:16 +00:00
X86RecognizableInstr.h [X86] Fix disassembly of EVEX rounding control and SAE instructions. 2017-10-23 02:26:24 +00:00
tdtags
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