.. |
AArch64
|
[AArch64][GlobalISel] Legalize vector G_PTR_ADD and enable selection.
|
2020-06-12 11:25:17 -07:00 |
AMDGPU
|
[amdgpu] Skip OR combining on 64-bit integer before legalizing ops.
|
2020-06-12 15:22:38 -04:00 |
ARC
|
…
|
|
ARM
|
[DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2))
|
2020-06-12 13:53:08 -04:00 |
AVR
|
[AVR][test] Remove test for naked function containing a return.
|
2020-06-09 09:06:47 +01:00 |
BPF
|
[BPF] fix incorrect type in BPFISelDAGToDAG readonly load optimization
|
2020-06-11 19:31:06 -07:00 |
Generic
|
[Tests] Migrate a number of tests to gc-live bundle representation
|
2020-06-05 16:44:04 -07:00 |
Hexagon
|
Simplify MachineVerifier's block-successor verification.
|
2020-06-06 22:30:51 -04:00 |
Inputs
|
…
|
|
Lanai
|
…
|
|
MIR
|
[MachineVerifier] Verify that a DBG_VALUE has a debug location
|
2020-05-28 13:53:40 -07:00 |
MSP430
|
…
|
|
Mips
|
[DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2))
|
2020-06-12 13:53:08 -04:00 |
NVPTX
|
…
|
|
PowerPC
|
DAGCombiner optimization for pow(x,0.75) and pow(x,0.25) on double and single precision even in case massv function is asked
|
2020-06-12 10:02:16 -04:00 |
RISCV
|
[DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2))
|
2020-06-12 13:53:08 -04:00 |
SPARC
|
[SPARC] Lower fp16 ops to libcalls
|
2020-06-10 19:15:26 -07:00 |
SystemZ
|
[CostModel] Unify Shuffle and InsertElement Costs
|
2020-06-10 09:13:34 +01:00 |
Thumb
|
…
|
|
Thumb2
|
[ARM] Add some MVE vecreduce tests. NFC
|
2020-06-09 12:07:19 +01:00 |
VE
|
[VE] Support lowering to NND instruction
|
2020-06-09 10:18:14 +02:00 |
WebAssembly
|
[WebAssembly] Make BR_TABLE non-duplicable
|
2020-06-11 15:11:45 -07:00 |
WinCFGuard
|
…
|
|
WinEH
|
…
|
|
X86
|
[DAG] foldAddSubOfSignBit - add support for non-uniform vector constants
|
2020-06-12 14:58:15 +01:00 |
XCore
|
…
|
|