forked from OSchip/llvm-project
102 lines
2.4 KiB
LLVM
102 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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define i8 @select_i8_neg1_or_0(i1 %a) {
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; CHECK-LABEL: select_i8_neg1_or_0:
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; CHECK: # BB#0:
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; CHECK-NEXT: shlb $7, %dil
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; CHECK-NEXT: sarb $7, %dil
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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;
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%b = sext i1 %a to i8
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ret i8 %b
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}
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define i8 @select_i8_neg1_or_0_zeroext(i1 zeroext %a) {
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; CHECK-LABEL: select_i8_neg1_or_0_zeroext:
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; CHECK: # BB#0:
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; CHECK-NEXT: shlb $7, %dil
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; CHECK-NEXT: sarb $7, %dil
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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;
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%b = sext i1 %a to i8
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ret i8 %b
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}
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define i16 @select_i16_neg1_or_0(i1 %a) {
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; CHECK-LABEL: select_i16_neg1_or_0:
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; CHECK: # BB#0:
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; CHECK-NEXT: shll $15, %edi
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; CHECK-NEXT: sarw $15, %di
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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;
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%b = sext i1 %a to i16
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ret i16 %b
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}
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define i16 @select_i16_neg1_or_0_zeroext(i1 zeroext %a) {
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; CHECK-LABEL: select_i16_neg1_or_0_zeroext:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: shll $15, %eax
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; CHECK-NEXT: sarw $15, %ax
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; CHECK-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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; CHECK-NEXT: retq
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;
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%b = sext i1 %a to i16
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ret i16 %b
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}
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define i32 @select_i32_neg1_or_0(i1 %a) {
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; CHECK-LABEL: select_i32_neg1_or_0:
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; CHECK: # BB#0:
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; CHECK-NEXT: shll $31, %edi
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; CHECK-NEXT: sarl $31, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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;
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%b = sext i1 %a to i32
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ret i32 %b
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}
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define i32 @select_i32_neg1_or_0_zeroext(i1 zeroext %a) {
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; CHECK-LABEL: select_i32_neg1_or_0_zeroext:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: shll $31, %eax
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; CHECK-NEXT: sarl $31, %eax
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; CHECK-NEXT: retq
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;
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%b = sext i1 %a to i32
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ret i32 %b
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}
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define i64 @select_i64_neg1_or_0(i1 %a) {
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; CHECK-LABEL: select_i64_neg1_or_0:
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; CHECK: # BB#0:
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; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; CHECK-NEXT: shlq $63, %rdi
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; CHECK-NEXT: sarq $63, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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;
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%b = sext i1 %a to i64
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ret i64 %b
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}
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define i64 @select_i64_neg1_or_0_zeroext(i1 zeroext %a) {
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; CHECK-LABEL: select_i64_neg1_or_0_zeroext:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: shlq $63, %rax
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; CHECK-NEXT: sarq $63, %rax
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; CHECK-NEXT: retq
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;
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%b = sext i1 %a to i64
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ret i64 %b
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}
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