forked from OSchip/llvm-project
134 lines
4.4 KiB
C++
134 lines
4.4 KiB
C++
//===-- X86TargetMachine.h - Define TargetMachine for the X86 ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the X86 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86TARGETMACHINE_H
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#define X86TARGETMACHINE_H
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#include "X86.h"
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#include "X86ELFWriterInfo.h"
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#include "X86InstrInfo.h"
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#include "X86ISelLowering.h"
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#include "X86FrameLowering.h"
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#include "X86JITInfo.h"
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#include "X86SelectionDAGInfo.h"
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#include "X86Subtarget.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetFrameLowering.h"
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namespace llvm {
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class formatted_raw_ostream;
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class StringRef;
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class X86TargetMachine : public LLVMTargetMachine {
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X86Subtarget Subtarget;
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X86FrameLowering FrameLowering;
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X86ELFWriterInfo ELFWriterInfo;
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public:
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X86TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM,
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bool is64Bit);
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virtual const X86InstrInfo *getInstrInfo() const {
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llvm_unreachable("getInstrInfo not implemented");
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}
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virtual const TargetFrameLowering *getFrameLowering() const {
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return &FrameLowering;
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}
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virtual X86JITInfo *getJITInfo() {
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llvm_unreachable("getJITInfo not implemented");
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}
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virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; }
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virtual const X86TargetLowering *getTargetLowering() const {
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llvm_unreachable("getTargetLowering not implemented");
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}
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virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
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llvm_unreachable("getSelectionDAGInfo not implemented");
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}
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virtual const X86RegisterInfo *getRegisterInfo() const {
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return &getInstrInfo()->getRegisterInfo();
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}
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virtual const X86ELFWriterInfo *getELFWriterInfo() const {
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return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
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}
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// Set up the pass pipeline.
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virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE);
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};
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/// X86_32TargetMachine - X86 32-bit target machine.
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///
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class X86_32TargetMachine : public X86TargetMachine {
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const TargetData DataLayout; // Calculates type size & alignment
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X86InstrInfo InstrInfo;
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X86SelectionDAGInfo TSInfo;
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X86TargetLowering TLInfo;
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X86JITInfo JITInfo;
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public:
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X86_32TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM);
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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virtual const X86TargetLowering *getTargetLowering() const {
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return &TLInfo;
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}
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virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
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return &TSInfo;
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}
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virtual const X86InstrInfo *getInstrInfo() const {
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return &InstrInfo;
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}
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virtual X86JITInfo *getJITInfo() {
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return &JITInfo;
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}
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};
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/// X86_64TargetMachine - X86 64-bit target machine.
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///
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class X86_64TargetMachine : public X86TargetMachine {
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const TargetData DataLayout; // Calculates type size & alignment
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X86InstrInfo InstrInfo;
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X86SelectionDAGInfo TSInfo;
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X86TargetLowering TLInfo;
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X86JITInfo JITInfo;
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public:
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X86_64TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM);
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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virtual const X86TargetLowering *getTargetLowering() const {
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return &TLInfo;
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}
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virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
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return &TSInfo;
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}
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virtual const X86InstrInfo *getInstrInfo() const {
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return &InstrInfo;
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}
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virtual X86JITInfo *getJITInfo() {
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return &JITInfo;
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}
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};
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} // End llvm namespace
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#endif
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