llvm-project/llvm/test
Tomasz Krupa f8c7637027 [X86] Block UndefRegUpdate
Summary: Prevent folding of operations with memory loads when one of the sources has undefined register update.

Reviewers: craig.topper

Subscribers: llvm-commits, mike.dvoretsky, ashlykov

Differential Revision: https://reviews.llvm.org/D47621

llvm-svn: 334175
2018-06-07 08:48:45 +00:00
..
Analysis [X86][SSE] Use multiplication scale factors for v8i16 SHL on pre-AVX2 targets. 2018-06-05 15:17:39 +00:00
Assembler [ThinLTO] Fix a few more test match issues 2018-05-26 03:50:29 +00:00
Bindings [LLVM-C] [OCaml] Remove LLVMAddBBVectorizePass 2018-05-28 16:58:10 +00:00
Bitcode [ThinLTO] Fix a few more test match issues 2018-05-26 03:50:29 +00:00
BugPoint
CodeGen [X86] Block UndefRegUpdate 2018-06-07 08:48:45 +00:00
DebugInfo [Debugify] Add a quiet mode to suppress warnings 2018-06-06 19:05:41 +00:00
Examples
ExecutionEngine [PowerPC] fix broken JIT-compiled code with tail call optimization 2018-05-30 04:48:29 +00:00
Feature Restore the LoopInstSimplify pass, reverting r327329 that removed it. 2018-05-25 01:32:36 +00:00
FileCheck
Instrumentation [msan] Don't check divisor shadow in fdiv. 2018-05-18 20:19:53 +00:00
Integer
JitListener [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
LTO [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Linker [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
MC [X86] Properly disassemble gather/scatter instructions where xmm4/ymm4/zmm4 are used as the index. 2018-06-06 19:15:15 +00:00
Object Implemented sane default for llvm-objdump's relocation Value format 2018-06-01 05:31:58 +00:00
ObjectYAML Resubmit [pdb] Change /DEBUG:GHASH to emit 8 byte hashes." 2018-05-17 22:55:15 +00:00
Other SpeculativeExecution Pass: Set PreserveCFG to avoid unnecessary analyses invalidation. 2018-06-07 00:19:29 +00:00
SafepointIRVerifier SafepointIRVerifier is made unreachable block tolerant 2018-05-23 05:54:55 +00:00
SymbolRewriter
TableGen TableGen: Streamline the semantics of NAME 2018-06-04 14:26:05 +00:00
ThinLTO/X86 [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Transforms [InstCombine] fold another shifty abs pattern to cmp+sel (PR36036) 2018-06-06 21:58:12 +00:00
Unit
Verifier [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
YAMLParser
tools llvm-readobj: fix printing number of relocations in Android packed format. 2018-06-07 00:02:07 +00:00
.clang-format
CMakeLists.txt [tools] Add missing test dependency 2018-05-07 22:00:59 +00:00
TestRunner.sh
lit.cfg.py [tools] Adjust the lit config for llvm-strip 2018-05-07 21:07:01 +00:00
lit.site.cfg.py.in Remove 'abi-breaking-checks' lit feature. 2018-05-09 12:39:39 +00:00