llvm-project/llvm/test/MC/Disassembler/PowerPC
Tony Jiang 425071eff3 [Power9] Add missing Power9 instructions.
The following 8 instructions are implemented in this patch.
addpcis(subpcis, lnia), darn, maddhd, maddhdu, maddld, setb

llvm-svn: 313636
2017-09-19 15:22:36 +00:00
..
dcbt.txt
lit.local.cfg
ppc64-encoding-4xx.txt
ppc64-encoding-6xx.txt
ppc64-encoding-bookII.txt
ppc64-encoding-bookIII.txt Add some Book-E instructions to the asm parser and printer. 2017-01-29 04:55:57 +00:00
ppc64-encoding-e500.txt
ppc64-encoding-ext.txt
ppc64-encoding-fp.txt [Power9] Add new instructions for floating point status and control registers. 2017-08-28 18:46:01 +00:00
ppc64-encoding-p8vector.txt
ppc64-encoding-p9vector.txt [PPC] Change the register constraint of the first source operand of instruction mtvsrdd to g8rc_nox0 2017-05-11 22:17:35 +00:00
ppc64-encoding-vmx.txt [PPC] add absolute difference altivec instructions and matching intrinsics 2016-10-31 19:47:52 +00:00
ppc64-encoding.txt [Power9] Add missing Power9 instructions. 2017-09-19 15:22:36 +00:00
ppc64-operands.txt
ppc64le-encoding.txt [Power9] Added support for the modsw, moduw, modsd, modud hardware instructions. 2017-06-12 17:58:42 +00:00
qpx.txt
vsx.txt [PowerPC][Altivec] Add mfvrd and mffprd extended mnemonic 2017-03-15 16:04:53 +00:00