llvm-project/llvm/lib/Target/AMDGPU
Tom Stellard f421837250 AMDGPU: Emit note directive for HSA even if there are no functions
Reviewers: arsenm, echristo

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D16010

llvm-svn: 257488
2016-01-12 17:18:17 +00:00
..
AsmParser AMDGPU/SI: Fix encoding for FLAT_SCRATCH registers on VI 2015-12-21 18:44:27 +00:00
InstPrinter Remove extra forward declarations and scrub includes for all in tree InstPrinters. NFC 2015-12-25 22:10:01 +00:00
MCTargetDesc AMDGPU: Emit functions sizes 2016-01-08 14:50:23 +00:00
TargetInfo
Utils AMDGPU/SI: Fix encoding for FLAT_SCRATCH registers on VI 2015-12-21 18:44:27 +00:00
AMDGPU.h AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions 2015-12-15 20:55:55 +00:00
AMDGPU.td AMDGPU: add +xnack feature 2016-01-04 23:35:53 +00:00
AMDGPUAlwaysInlinePass.cpp AMDGPU: Minor cleanups to always inline pass 2015-07-13 19:08:36 +00:00
AMDGPUAnnotateKernelFeatures.cpp AMDGPU: Add llvm.amdgcn.dispatch.ptr intrinsic 2015-11-26 00:43:29 +00:00
AMDGPUAnnotateUniformValues.cpp AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions 2015-12-15 20:55:55 +00:00
AMDGPUAsmPrinter.cpp AMDGPU: Emit note directive for HSA even if there are no functions 2016-01-12 17:18:17 +00:00
AMDGPUAsmPrinter.h AMDGPU: Emit note directive for HSA even if there are no functions 2016-01-12 17:18:17 +00:00
AMDGPUCallingConv.td
AMDGPUDiagnosticInfoUnsupported.cpp AMDGPU: Split DiagnosticInfoUnsupported into its own file 2015-10-21 22:37:46 +00:00
AMDGPUDiagnosticInfoUnsupported.h AMDGPU: Split DiagnosticInfoUnsupported into its own file 2015-10-21 22:37:46 +00:00
AMDGPUFrameLowering.cpp Remove redundant TargetFrameLowering::getFrameIndexOffset virtual 2015-08-15 02:32:35 +00:00
AMDGPUFrameLowering.h AMDGPU: Create emergency stack slots during frame lowering 2015-11-06 18:17:45 +00:00
AMDGPUISelDAGToDAG.cpp AMDGPU/SI: Use flat for global load/store when targeting HSA 2015-12-22 20:55:23 +00:00
AMDGPUISelLowering.cpp AMDGPU: Implement {{s|u}}int_to_fp i64 -> f32 2016-01-11 22:01:48 +00:00
AMDGPUISelLowering.h AMDGPU: Implement {{s|u}}int_to_fp i64 -> f32 2016-01-11 22:01:48 +00:00
AMDGPUInstrInfo.cpp Make a bunch of static arrays const. 2015-10-18 05:15:34 +00:00
AMDGPUInstrInfo.h AMDGPU: Make getNamedOperandIdx declaration readonly 2015-09-25 18:09:15 +00:00
AMDGPUInstrInfo.td AMDGPU: Pattern match ffbh pattern to instruction. 2016-01-11 17:02:00 +00:00
AMDGPUInstructions.td AMDGPU/SI: Consolidate FLAT patterns 2016-01-05 02:26:37 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td AMDGPU: Switch barrier intrinsics to using convergent 2015-12-19 01:46:41 +00:00
AMDGPUMCInstLower.cpp AMDGPU/SI: Fix encoding for FLAT_SCRATCH registers on VI 2015-12-21 18:44:27 +00:00
AMDGPUMCInstLower.h
AMDGPUMachineFunction.cpp AMDGPU/SI: Add getShaderType() function to Utils/ 2015-12-15 16:26:16 +00:00
AMDGPUMachineFunction.h AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL 2015-11-06 11:45:14 +00:00
AMDGPUOpenCLImageTypeLoweringPass.cpp AMDGPU/SI: Remove assert from AMDGPUOpenCLImageTypeLowering pass 2015-10-01 21:16:05 +00:00
AMDGPUPromoteAlloca.cpp Revert "Change memcpy/memset/memmove to have dest and source alignments." 2015-11-19 05:56:52 +00:00
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h AMDGPU: Remove dead code 2015-09-19 06:41:10 +00:00
AMDGPURegisterInfo.td AMDGPU: Set SubRegIndex size and offset 2015-07-30 17:03:11 +00:00
AMDGPUSubtarget.cpp AMDGPU: add +xnack feature 2016-01-04 23:35:53 +00:00
AMDGPUSubtarget.h AMDGPU: add +xnack feature 2016-01-04 23:35:53 +00:00
AMDGPUTargetMachine.cpp AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions 2015-12-15 20:55:55 +00:00
AMDGPUTargetMachine.h AMDGPU/SI: Use .hsatext section instead of .text for HSA 2015-09-25 21:41:28 +00:00
AMDGPUTargetObjectFile.cpp AMDGPU/SI: Emit constant variables in the .hsatext section when targeting HSA 2015-12-15 22:39:36 +00:00
AMDGPUTargetObjectFile.h AMDGPU/SI: Emit constant arrays in the .text section 2015-12-10 02:13:01 +00:00
AMDGPUTargetTransformInfo.cpp AMDGPU: Fix getRegisterBitWidth for vectors 2015-12-24 05:14:55 +00:00
AMDGPUTargetTransformInfo.h AMDGPU: Override getCFInstrCost 2015-12-16 18:37:19 +00:00
AMDILCFGStructurizer.cpp Normalize MBB's successors' probabilities in several locations. 2015-12-13 09:26:17 +00:00
AMDKernelCodeT.h AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
CIInstructions.td AMDGPU/SI: Consolidate FLAT patterns 2016-01-05 02:26:37 +00:00
CMakeLists.txt AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions 2015-12-15 20:55:55 +00:00
CaymanInstructions.td AMDGPU: Add MEM_RAT STORE_TYPED. 2015-10-01 17:51:34 +00:00
EvergreenInstructions.td AMDGPU: Pattern match ffbh pattern to instruction. 2016-01-11 17:02:00 +00:00
LLVMBuild.txt AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
Makefile AMDGPU/SI: Add hsa code object directives 2015-06-26 21:15:07 +00:00
Processors.td AMDGPU: Add stony support 2015-11-13 17:06:32 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp AMDGPU: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:07:10 +00:00
R600Defines.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600ISelLowering.cpp AMDGPU: Add MEM_RAT STORE_TYPED. 2015-10-01 17:51:34 +00:00
R600ISelLowering.h Make TargetLowering::getPointerTy() taking DataLayout as an argument 2015-07-09 02:09:04 +00:00
R600InstrFormats.td
R600InstrInfo.cpp Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC. 2015-09-10 23:10:42 +00:00
R600InstrInfo.h Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC. 2015-09-10 23:10:42 +00:00
R600Instructions.td Fix typos. 2015-09-12 01:17:08 +00:00
R600Intrinsics.td
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp AMDGPU: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:07:10 +00:00
R600Packetizer.cpp [Packetizer] Add AliasAnalysis as a parameter to the packetizer 2015-12-14 20:35:13 +00:00
R600RegisterInfo.cpp
R600RegisterInfo.h AMDGPU: Remove dead code 2015-09-19 06:41:10 +00:00
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
R700Instructions.td
SIAnnotateControlFlow.cpp AMDGPU: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:07:10 +00:00
SIDefines.h AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp 2015-10-06 15:57:53 +00:00
SIFixControlFlowLiveIntervals.cpp AMDGPU: Remove unused includes 2015-09-25 00:28:43 +00:00
SIFixSGPRCopies.cpp AMDGPU/SI: Fold operands with sub-registers 2016-01-07 17:10:29 +00:00
SIFixSGPRLiveRanges.cpp AMDGPU: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:07:10 +00:00
SIFoldOperands.cpp AMDGPU/SI: Fold operands with sub-registers 2016-01-07 17:10:29 +00:00
SIFrameLowering.cpp AMDGPU/SI: Do not move scratch resource register on Tonga & Iceland 2016-01-05 20:42:49 +00:00
SIFrameLowering.h AMDGPU: Remove SIPrepareScratchRegs 2015-11-30 21:15:53 +00:00
SIISelLowering.cpp AMDGPU: Fix crash with dispatch.ptr intrinsic with non-HSA target 2016-01-11 21:18:33 +00:00
SIISelLowering.h AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions 2015-12-15 20:55:55 +00:00
SIInsertWaits.cpp AMDGPU: Add MachineInstr overloads for instruction format tests 2015-10-20 04:35:43 +00:00
SIInstrFormats.td AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp 2015-10-06 15:57:53 +00:00
SIInstrInfo.cpp AMDGPU/SI: Fold operands with sub-registers 2016-01-07 17:10:29 +00:00
SIInstrInfo.h AMDGPU: Fix off-by-one in SIRegisterInfo::eliminateFrameIndex 2015-12-17 16:46:42 +00:00
SIInstrInfo.td AMDGPU/SI: Select non-uniform constant addrspace loads to flat instructions for HSA 2016-01-05 03:40:16 +00:00
SIInstructions.td AMDGPU: Pattern match ffbh pattern to instruction. 2016-01-11 17:02:00 +00:00
SIIntrinsics.td
SILoadStoreOptimizer.cpp AMDGPU/SI: Fix read2 merging into a super register. 2015-07-14 17:57:36 +00:00
SILowerControlFlow.cpp AMDGPU: Fix adding redundant m0 uses 2015-10-21 22:37:51 +00:00
SILowerI1Copies.cpp AMDGPU: Fix recomputing dominator tree unnecessarily 2015-09-25 17:21:28 +00:00
SIMachineFunctionInfo.cpp AMDGPU: Avoid assertions after SGPR spilling failed 2016-01-04 15:50:01 +00:00
SIMachineFunctionInfo.h AMDGPU: Rework how private buffer passed for HSA 2015-11-30 21:16:03 +00:00
SIRegisterInfo.cpp AMDGPU/SI: Fold operands with sub-registers 2016-01-07 17:10:29 +00:00
SIRegisterInfo.h AMDGPU: Optimize VOP2 operand legalization 2015-12-01 19:57:17 +00:00
SIRegisterInfo.td AMDGPU/SI: Fix encoding for FLAT_SCRATCH registers on VI 2015-12-21 18:44:27 +00:00
SISchedule.td AMDGPU: Improve accuracy of instruction rates for VOPC 2015-09-25 16:58:25 +00:00
SIShrinkInstructions.cpp AMDGPU: Add MachineInstr overloads for instruction format tests 2015-10-20 04:35:43 +00:00
SITypeRewriter.cpp AMDGPU/SI: Fix crash when inline assembly is used in a graphics shader 2016-01-06 22:01:04 +00:00
VIInstrFormats.td
VIInstructions.td AMDGPU/SI: Move VI SMEM pattern back into VIInstructions.td 2016-01-04 20:23:10 +00:00