forked from OSchip/llvm-project
30 lines
694 B
YAML
30 lines
694 B
YAML
# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @hint() { ret void }
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...
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---
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# Check that we select a 'hint' intrinsic into a HINT instruction.
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# CHECK-LABEL: name: hint
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name: hint
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
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registers:
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- { id: 0, class: gpr }
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# CHECK: body:
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# CHECK: HINT 1
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body: |
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bb.0:
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liveins: $w0
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%0(s32) = G_CONSTANT i32 1
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G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.hint), %0
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...
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