forked from OSchip/llvm-project
54 lines
1.7 KiB
YAML
54 lines
1.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-- -mattr=+lse -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @cmpxchg_i32(i64* %addr) { ret void }
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define void @cmpxchg_i64(i64* %addr) { ret void }
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...
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---
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name: cmpxchg_i32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: cmpxchg_i32
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[CMP:%[0-9]+]]:gpr32 = MOVi32imm 0
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; CHECK: [[CST:%[0-9]+]]:gpr32 = MOVi32imm 1
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; CHECK: [[RES:%[0-9]+]]:gpr32 = CASW [[CMP]], [[CST]], [[COPY]] :: (load store monotonic 8 on %ir.addr)
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; CHECK: $w0 = COPY [[RES]]
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%0:gpr(p0) = COPY $x0
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%1:gpr(s32) = G_CONSTANT i32 0
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%2:gpr(s32) = G_CONSTANT i32 1
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%3:gpr(s32) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 8 on %ir.addr)
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$w0 = COPY %3(s32)
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...
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---
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name: cmpxchg_i64
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: cmpxchg_i64
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[CMP:%[0-9]+]]:gpr64 = MOVi64imm 0
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; CHECK: [[CST:%[0-9]+]]:gpr64 = MOVi64imm 1
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; CHECK: [[RES:%[0-9]+]]:gpr64 = CASX [[CMP]], [[CST]], [[COPY]] :: (load store monotonic 8 on %ir.addr)
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; CHECK: $x0 = COPY [[RES]]
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 0
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%2:gpr(s64) = G_CONSTANT i64 1
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%3:gpr(s64) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 8 on %ir.addr)
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$x0 = COPY %3(s64)
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...
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