forked from OSchip/llvm-project
277 lines
9.4 KiB
C++
277 lines
9.4 KiB
C++
#include "AArch64Subtarget.h"
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#include "AArch64TargetMachine.h"
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#include "llvm/CodeGen/MIRParser/MIRParser.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/MemoryBuffer.h"
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#include "llvm/Support/TargetSelect.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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namespace {
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std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
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auto TT(Triple::normalize("aarch64--"));
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std::string CPU("generic");
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std::string FS("");
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LLVMInitializeAArch64TargetInfo();
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LLVMInitializeAArch64Target();
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LLVMInitializeAArch64TargetMC();
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std::string Error;
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const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error);
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return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
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TheTarget->createTargetMachine(TT, CPU, FS, TargetOptions(), None, None,
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CodeGenOpt::Default)));
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}
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std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {
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AArch64Subtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()),
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std::string(TM->getTargetCPU()),
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std::string(TM->getTargetFeatureString()), *TM,
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/* isLittle */ false);
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return std::make_unique<AArch64InstrInfo>(ST);
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}
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/// The \p InputIRSnippet is only needed for things that can't be expressed in
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/// the \p InputMIRSnippet (global variables etc)
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/// TODO: Some of this might be useful for other architectures as well - extract
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/// the platform-independent parts somewhere they can be reused.
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void runChecks(
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LLVMTargetMachine *TM, AArch64InstrInfo *II, const StringRef InputIRSnippet,
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const StringRef InputMIRSnippet,
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std::function<void(AArch64InstrInfo &, MachineFunction &)> Checks) {
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LLVMContext Context;
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auto MIRString =
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"--- |\n"
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" declare void @sizes()\n"
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+ InputIRSnippet.str() +
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"...\n"
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"---\n"
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"name: sizes\n"
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"jumpTable:\n"
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" kind: block-address\n"
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" entries:\n"
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" - id: 0\n"
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" blocks: [ '%bb.0' ]\n"
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"body: |\n"
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" bb.0:\n"
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+ InputMIRSnippet.str();
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std::unique_ptr<MemoryBuffer> MBuffer = MemoryBuffer::getMemBuffer(MIRString);
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std::unique_ptr<MIRParser> MParser =
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createMIRParser(std::move(MBuffer), Context);
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ASSERT_TRUE(MParser);
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std::unique_ptr<Module> M = MParser->parseIRModule();
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ASSERT_TRUE(M);
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M->setTargetTriple(TM->getTargetTriple().getTriple());
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M->setDataLayout(TM->createDataLayout());
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MachineModuleInfo MMI(TM);
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bool Res = MParser->parseMachineFunctions(*M, MMI);
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ASSERT_FALSE(Res);
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auto F = M->getFunction("sizes");
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ASSERT_TRUE(F != nullptr);
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auto &MF = MMI.getOrCreateMachineFunction(*F);
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Checks(*II, MF);
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}
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} // anonymous namespace
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TEST(InstSizes, Authenticated) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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ASSERT_TRUE(TM);
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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auto isAuthInst = [](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(4u, II.getInstSizeInBytes(*I));
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EXPECT_TRUE(I->getDesc().isAuthenticated());
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};
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runChecks(TM.get(), II.get(), "",
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" \n"
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" BLRAA $x10, $x9\n",
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isAuthInst);
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runChecks(TM.get(), II.get(), "",
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" \n"
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" RETAB implicit $lr, implicit $sp, implicit killed $x0\n",
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isAuthInst);
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runChecks(TM.get(), II.get(), "",
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" \n"
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" frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp\n",
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isAuthInst);
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runChecks(TM.get(), II.get(), "",
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" \n"
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" frame-destroy AUTIBSP implicit-def $lr, implicit killed $lr, implicit $sp\n",
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isAuthInst);
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}
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TEST(InstSizes, STACKMAP) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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ASSERT_TRUE(TM);
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(TM.get(), II.get(), "", " STACKMAP 0, 16\n"
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" STACKMAP 1, 32\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(16u, II.getInstSizeInBytes(*I));
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++I;
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EXPECT_EQ(32u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, PATCHPOINT) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(TM.get(), II.get(), "",
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" PATCHPOINT 0, 16, 0, 0, 0, csr_aarch64_aapcs\n"
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" PATCHPOINT 1, 32, 0, 0, 0, csr_aarch64_aapcs\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(16u, II.getInstSizeInBytes(*I));
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++I;
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EXPECT_EQ(32u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, STATEPOINT) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(TM.get(), II.get(), "",
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" STATEPOINT 0, 0, 0, @sizes, 2, 0, 2, 0, 2, 0, 2, 1, 1, 8,"
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" $sp, 24, 2, 0, 2, 1, 0, 0\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(4u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, SPACE) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(TM.get(), II.get(), "",
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" $xzr = SPACE 1024, undef $xzr\n"
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" dead $xzr = SPACE 4096, $xzr\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(1024u, II.getInstSizeInBytes(*I));
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++I;
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EXPECT_EQ(4096u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, TLSDESC_CALLSEQ) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(
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TM.get(), II.get(),
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" @ThreadLocalGlobal = external thread_local global i32, align 8\n",
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" TLSDESC_CALLSEQ target-flags(aarch64-tls) @ThreadLocalGlobal\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(16u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, StoreSwiftAsyncContext) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(
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TM.get(), II.get(), "",
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" StoreSwiftAsyncContext $x0, $x1, 12, implicit-def $x16, "
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"implicit-def $x17\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(20u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, SpeculationBarrierISBDSBEndBB) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(
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TM.get(), II.get(), "",
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" SpeculationBarrierISBDSBEndBB\n"
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" BR $x8\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(8u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, SpeculationBarrierSBEndBB) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(
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TM.get(), II.get(), "",
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" SpeculationBarrierSBEndBB\n"
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" BR $x8\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(4u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, JumpTable) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(TM.get(), II.get(), "",
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" $x10, $x11 = JumpTableDest32 $x9, $x8, %jump-table.0\n"
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" $x10, $x11 = JumpTableDest16 $x9, $x8, %jump-table.0\n"
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" $x10, $x11 = JumpTableDest8 $x9, $x8, %jump-table.0\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(12u, II.getInstSizeInBytes(*I));
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++I;
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EXPECT_EQ(12u, II.getInstSizeInBytes(*I));
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++I;
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EXPECT_EQ(12u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, MOPSMemoryPseudos) {
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(TM.get(), II.get(), "",
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" $x0, $x1, $x2 = MOPSMemoryMovePseudo $x0, $x1, $x2, "
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"implicit-def $nzcv\n"
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" $x0, $x1 = MOPSMemorySetPseudo $x0, $x1, $x2, "
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"implicit-def $nzcv\n"
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" $x0, $x1, $x8 = MOPSMemoryCopyPseudo $x0, $x1, $x8, "
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"implicit-def $nzcv\n"
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" $x0, $x1 = MOPSMemorySetTaggingPseudo $x0, $x1, $x2, "
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"implicit-def $nzcv\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(12u, II.getInstSizeInBytes(*I));
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++I;
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EXPECT_EQ(12u, II.getInstSizeInBytes(*I));
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++I;
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EXPECT_EQ(12u, II.getInstSizeInBytes(*I));
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++I;
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EXPECT_EQ(12u, II.getInstSizeInBytes(*I));
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});
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}
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