forked from OSchip/llvm-project
94 lines
4.5 KiB
LLVM
94 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -loop-reduce -S < %s | FileCheck %s
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; Check when we use an outerloop induction variable inside of an innerloop
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; induction value expr, LSR can still choose to use single induction variable
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; for the innerloop and share it in multiple induction value exprs.
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @foo(i32 %size, i32 %nsteps, i32 %hsize, i32* %lined, i8* %maxarray) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP215:%.*]] = icmp sgt i32 [[SIZE:%.*]], 1
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; CHECK-NEXT: [[T0:%.*]] = zext i32 [[SIZE]] to i64
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; CHECK-NEXT: [[T1:%.*]] = sext i32 [[NSTEPS:%.*]] to i64
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; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[T0]], -1
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i64 [ [[LSR_IV_NEXT2:%.*]], [[FOR_INC:%.*]] ], [ 1, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[INDVARS_IV2:%.*]] = phi i64 [ [[INDVARS_IV_NEXT3:%.*]], [[FOR_INC]] ], [ 0, [[ENTRY]] ]
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; CHECK-NEXT: br i1 [[CMP215]], label [[FOR_BODY2_PREHEADER:%.*]], label [[FOR_INC]]
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; CHECK: for.body2.preheader:
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; CHECK-NEXT: br label [[FOR_BODY2:%.*]]
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; CHECK: for.body2:
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; CHECK-NEXT: [[LSR_IV3:%.*]] = phi i8* [ [[SCEVGEP:%.*]], [[FOR_BODY2]] ], [ [[MAXARRAY:%.*]], [[FOR_BODY2_PREHEADER]] ]
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[FOR_BODY2]] ], [ [[TMP0]], [[FOR_BODY2_PREHEADER]] ]
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; CHECK-NEXT: [[SCEVGEP6:%.*]] = getelementptr i8, i8* [[LSR_IV3]], i64 1
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; CHECK-NEXT: [[V1:%.*]] = load i8, i8* [[SCEVGEP6]], align 1
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; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, i8* [[LSR_IV3]], i64 [[TMP0]]
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; CHECK-NEXT: [[V2:%.*]] = load i8, i8* [[SCEVGEP5]], align 1
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; CHECK-NEXT: [[TMPV:%.*]] = xor i8 [[V1]], [[V2]]
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; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, i8* [[LSR_IV3]], i64 [[LSR_IV1]]
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; CHECK-NEXT: store i8 [[TMPV]], i8* [[SCEVGEP4]], align 1
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; CHECK-NEXT: [[LSR_IV_NEXT]] = add nsw i64 [[LSR_IV]], -1
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; CHECK-NEXT: [[SCEVGEP]] = getelementptr i8, i8* [[LSR_IV3]], i64 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[LSR_IV_NEXT]], 0
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY2]], label [[FOR_INC_LOOPEXIT:%.*]]
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; CHECK: for.inc.loopexit:
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; CHECK-NEXT: br label [[FOR_INC]]
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; CHECK: for.inc:
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; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1
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; CHECK-NEXT: [[LSR_IV_NEXT2]] = add nuw nsw i64 [[LSR_IV1]], [[T0]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT3]], [[T1]]
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
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; CHECK: for.end.loopexit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp215 = icmp sgt i32 %size, 1
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%t0 = zext i32 %size to i64
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%t1 = sext i32 %nsteps to i64
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%sub2 = sub i64 %t0, 2
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br label %for.body
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for.body: ; preds = %for.inc, %entry
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%indvars.iv2 = phi i64 [ %indvars.iv.next3, %for.inc ], [ 0, %entry ]
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%t2 = mul nsw i64 %indvars.iv2, %t0
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br i1 %cmp215, label %for.body2.preheader, label %for.inc
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for.body2.preheader: ; preds = %for.body
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br label %for.body2
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; Check LSR only generates two induction variables for for.body2 one for compare and
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; one to shared by multiple array accesses.
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for.body2: ; preds = %for.body2.preheader, %for.body2
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%indvars.iv = phi i64 [ 1, %for.body2.preheader ], [ %indvars.iv.next, %for.body2 ]
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%arrayidx1 = getelementptr inbounds i8, i8* %maxarray, i64 %indvars.iv
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%v1 = load i8, i8* %arrayidx1, align 1
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%idx2 = add nsw i64 %indvars.iv, %sub2
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%arrayidx2 = getelementptr inbounds i8, i8* %maxarray, i64 %idx2
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%v2 = load i8, i8* %arrayidx2, align 1
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%tmpv = xor i8 %v1, %v2
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%t4 = add nsw i64 %t2, %indvars.iv
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%add.ptr = getelementptr inbounds i8, i8* %maxarray, i64 %t4
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store i8 %tmpv, i8* %add.ptr, align 1
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%wide.trip.count = zext i32 %size to i64
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%exitcond = icmp ne i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond, label %for.body2, label %for.inc.loopexit
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for.inc.loopexit: ; preds = %for.body2
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br label %for.inc
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for.inc: ; preds = %for.inc.loopexit, %for.body
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%indvars.iv.next3 = add nuw nsw i64 %indvars.iv2, 1
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%cmp = icmp slt i64 %indvars.iv.next3, %t1
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br i1 %cmp, label %for.body, label %for.end.loopexit
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for.end.loopexit: ; preds = %for.inc
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ret void
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}
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