forked from OSchip/llvm-project
279 lines
14 KiB
LLVM
279 lines
14 KiB
LLVM
; RUN: opt < %s -dfsan -S | FileCheck %s
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; RUN: opt < %s -dfsan -dfsan-track-origins=1 -S | FileCheck %s --check-prefixes=CHECK,CHECK_ORIGIN
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; RUN: opt < %s -dfsan -dfsan-track-origins=1 -dfsan-instrument-with-call-threshold=0 -S | FileCheck %s --check-prefixes=CHECK,CHECK_ORIGIN
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; CHECK: @__dfsan_arg_tls = external thread_local(initialexec) global [[TLS_ARR:\[100 x i64\]]]
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; CHECK: @__dfsan_retval_tls = external thread_local(initialexec) global [[TLS_ARR]]
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; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
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; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
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define i32 @AtomicRmwXchg(i32* %p, i32 %x) {
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entry:
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; COMM: atomicrmw xchg: store clean shadow/origin, return clean shadow/origin
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; CHECK-LABEL: @AtomicRmwXchg.dfsan
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; CHECK-NOT: @__dfsan_arg_origin_tls
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; CHECK-NOT: @__dfsan_arg_tls
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; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
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; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
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; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
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; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK-NEXT: atomicrmw xchg i32* %p, i32 %x seq_cst
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; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
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; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
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; CHECK-NEXT: ret i32
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%0 = atomicrmw xchg i32* %p, i32 %x seq_cst
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ret i32 %0
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}
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define i32 @AtomicRmwMax(i32* %p, i32 %x) {
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; COMM: atomicrmw max: exactly the same as above
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; CHECK-LABEL: @AtomicRmwMax.dfsan
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; CHECK-NOT: @__dfsan_arg_origin_tls
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; CHECK-NOT: @__dfsan_arg_tls
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; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
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; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
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; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
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; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK-NEXT: atomicrmw max i32* %p, i32 %x seq_cst
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; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
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; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
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; CHECK-NEXT: ret i32
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entry:
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%0 = atomicrmw max i32* %p, i32 %x seq_cst
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ret i32 %0
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}
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define i32 @Cmpxchg(i32* %p, i32 %a, i32 %b) {
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; COMM: cmpxchg: store clean shadow/origin, return clean shadow/origin
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; CHECK-LABEL: @Cmpxchg.dfsan
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; CHECK-NOT: @__dfsan_arg_origin_tls
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; CHECK-NOT: @__dfsan_arg_tls
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; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
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; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
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; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
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; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK-NEXT: %pair = cmpxchg i32* %p, i32 %a, i32 %b seq_cst seq_cst
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; CHECK: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
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; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
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; CHECK-NEXT: ret i32
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entry:
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%pair = cmpxchg i32* %p, i32 %a, i32 %b seq_cst seq_cst
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%0 = extractvalue { i32, i1 } %pair, 0
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ret i32 %0
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}
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define i32 @CmpxchgMonotonic(i32* %p, i32 %a, i32 %b) {
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; COMM: relaxed cmpxchg: bump up to "release monotonic"
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; CHECK-LABEL: @CmpxchgMonotonic.dfsan
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; CHECK-NOT: @__dfsan_arg_origin_tls
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; CHECK-NOT: @__dfsan_arg_tls
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; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
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; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
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; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
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; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK-NEXT: %pair = cmpxchg i32* %p, i32 %a, i32 %b release monotonic
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; CHECK: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
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; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
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; CHECK-NEXT: ret i32
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entry:
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%pair = cmpxchg i32* %p, i32 %a, i32 %b monotonic monotonic
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%0 = extractvalue { i32, i1 } %pair, 0
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ret i32 %0
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}
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define i32 @AtomicLoad(i32* %p) {
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; COMM: atomic load: load shadow value after app value
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; CHECK-LABEL: @AtomicLoad.dfsan
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; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
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; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
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; CHECK: %a = load atomic i32, i32* %p seq_cst, align 16
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; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
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; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
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; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
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; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
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; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
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; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
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; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
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; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
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; CHECK: ret i32 %a
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entry:
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%a = load atomic i32, i32* %p seq_cst, align 16
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ret i32 %a
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}
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define i32 @AtomicLoadAcquire(i32* %p) {
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; COMM: atomic load: load shadow value after app value
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; CHECK-LABEL: @AtomicLoadAcquire.dfsan
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; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
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; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
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; CHECK: %a = load atomic i32, i32* %p acquire, align 16
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; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
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; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
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; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
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; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
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; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
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; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
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; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
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; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
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; CHECK: ret i32 %a
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entry:
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%a = load atomic i32, i32* %p acquire, align 16
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ret i32 %a
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}
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define i32 @AtomicLoadMonotonic(i32* %p) {
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; COMM: atomic load monotonic: bump up to load acquire
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; CHECK-LABEL: @AtomicLoadMonotonic.dfsan
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; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
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; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
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; CHECK: %a = load atomic i32, i32* %p acquire, align 16
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; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
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; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
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; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
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; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
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; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
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; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
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; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
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; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
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; CHECK: ret i32 %a
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entry:
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%a = load atomic i32, i32* %p monotonic, align 16
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ret i32 %a
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}
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define i32 @AtomicLoadUnordered(i32* %p) {
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; COMM: atomic load unordered: bump up to load acquire
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; CHECK-LABEL: @AtomicLoadUnordered.dfsan
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; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
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; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
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; CHECK: %a = load atomic i32, i32* %p acquire, align 16
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; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
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; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
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; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
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; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
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; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
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; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
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; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
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; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
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; CHECK: ret i32 %a
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entry:
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%a = load atomic i32, i32* %p unordered, align 16
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ret i32 %a
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}
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define void @AtomicStore(i32* %p, i32 %x) {
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; COMM: atomic store: store clean shadow value before app value
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; CHECK-LABEL: @AtomicStore.dfsan
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; CHECK-NOT: @__dfsan_arg_origin_tls
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; CHECK-NOT: @__dfsan_arg_tls
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; CHECK_ORIGIN-NOT: 35184372088832
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; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
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; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
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; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
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; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK: store atomic i32 %x, i32* %p seq_cst, align 16
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; CHECK: ret void
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entry:
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store atomic i32 %x, i32* %p seq_cst, align 16
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ret void
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}
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define void @AtomicStoreRelease(i32* %p, i32 %x) {
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; COMM: atomic store: store clean shadow value before app value
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; CHECK-LABEL: @AtomicStoreRelease.dfsan
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; CHECK-NOT: @__dfsan_arg_origin_tls
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; CHECK-NOT: @__dfsan_arg_tls
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; CHECK_ORIGIN-NOT: 35184372088832
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; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
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; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
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; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
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; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK: store atomic i32 %x, i32* %p release, align 16
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; CHECK: ret void
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entry:
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store atomic i32 %x, i32* %p release, align 16
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ret void
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}
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define void @AtomicStoreMonotonic(i32* %p, i32 %x) {
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; COMM: atomic store monotonic: bumped up to store release
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; CHECK-LABEL: @AtomicStoreMonotonic.dfsan
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; CHECK-NOT: @__dfsan_arg_origin_tls
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; CHECK-NOT: @__dfsan_arg_tls
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; CHECK_ORIGIN-NOT: 35184372088832
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; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
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; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
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; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
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; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK: store atomic i32 %x, i32* %p release, align 16
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; CHECK: ret void
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entry:
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store atomic i32 %x, i32* %p monotonic, align 16
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ret void
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}
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define void @AtomicStoreUnordered(i32* %p, i32 %x) {
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; COMM: atomic store unordered: bumped up to store release
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; CHECK-LABEL: @AtomicStoreUnordered.dfsan
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; CHECK-NOT: @__dfsan_arg_origin_tls
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; CHECK-NOT: @__dfsan_arg_tls
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; CHECK_ORIGIN-NOT: 35184372088832
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; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
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; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
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; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
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; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
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; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
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; CHECK: store atomic i32 %x, i32* %p release, align 16
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; CHECK: ret void
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entry:
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store atomic i32 %x, i32* %p unordered, align 16
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ret void
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}
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