forked from OSchip/llvm-project
51 lines
1.6 KiB
LLVM
51 lines
1.6 KiB
LLVM
; RUN: llc -march=hexagon -enable-pipeliner -stats -o /dev/null < %s 2>&1 | FileCheck %s --check-prefix=STATS
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; REQUIRES: asserts
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; Test that we don't pipeline, incorrectly, the swap operation.
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; STATS-NOT: 1 pipeliner - Number of loops software pipelined
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@g0 = common global i32* null, align 4
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; Function Attrs: nounwind
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define void @f0(i32 %a0, i32 %a1, i32 %a2) #0 {
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b0:
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%v0 = icmp sgt i32 %a2, 0
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br i1 %v0, label %b1, label %b4
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b1: ; preds = %b0
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%v1 = load i32*, i32** @g0, align 4, !tbaa !0
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br label %b2
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b2: ; preds = %b2, %b1
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%v2 = phi i32 [ %a0, %b1 ], [ %v9, %b2 ]
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%v3 = phi i32 [ %a2, %b1 ], [ %v11, %b2 ]
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%v4 = phi i32 [ %a1, %b1 ], [ %v10, %b2 ]
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%v5 = getelementptr inbounds i32, i32* %v1, i32 %v2
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%v6 = load i32, i32* %v5, align 4, !tbaa !4
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%v7 = getelementptr inbounds i32, i32* %v1, i32 %v4
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%v8 = load i32, i32* %v7, align 4, !tbaa !4
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store i32 %v8, i32* %v5, align 4, !tbaa !4
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store i32 %v6, i32* %v7, align 4, !tbaa !4
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%v9 = add nsw i32 %v2, 1
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%v10 = add nsw i32 %v4, 1
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%v11 = add nsw i32 %v3, -1
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%v12 = icmp sgt i32 %v11, 0
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br i1 %v12, label %b2, label %b3
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b3: ; preds = %b2
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br label %b4
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b4: ; preds = %b3, %b0
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"any pointer", !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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!4 = !{!5, !5, i64 0}
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!5 = !{!"int", !2, i64 0}
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