forked from OSchip/llvm-project
67 lines
2.0 KiB
LLVM
67 lines
2.0 KiB
LLVM
; RUN: llc -march=hexagon -enable-pipeliner=true -stats -o /dev/null < %s \
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; RUN: 2>&1 | FileCheck %s --check-prefix=STATS
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; REQUIRES: asserts
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; Test that we do not schedule chained references too far apart,
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; which enables the loop to be pipelined. In this test, the loop should
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; not be pipelined when the chained references are constrained correctly.
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; STATS-NOT: 1 pipeliner - Number of loops software pipelined
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; Function Attrs: nounwind
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define void @f0() #0 {
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b0:
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br label %b2
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b1: ; preds = %b6
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br label %b7
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b2: ; preds = %b6, %b0
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br label %b3
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b3: ; preds = %b5, %b2
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br i1 undef, label %b4, label %b5
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b4: ; preds = %b3
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br label %b5
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b5: ; preds = %b4, %b3
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br i1 undef, label %b3, label %b6
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b6: ; preds = %b5
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br i1 undef, label %b1, label %b2
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b7: ; preds = %b7, %b1
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%v0 = phi i32 [ 0, %b1 ], [ %v4, %b7 ]
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%v1 = load i16, i16* undef, align 8, !tbaa !0
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%v2 = icmp sgt i16 %v1, undef
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%v3 = select i1 %v2, i16 4, i16 undef
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store i16 %v3, i16* undef, align 2, !tbaa !0
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store i16 -32768, i16* undef, align 2, !tbaa !0
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%v4 = add i32 %v0, 1
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%v5 = icmp eq i32 %v4, 5
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br i1 %v5, label %b8, label %b7
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b8: ; preds = %b7
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br i1 undef, label %b9, label %b10
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b9: ; preds = %b8
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br label %b10
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b10: ; preds = %b9, %b8
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br i1 undef, label %b11, label %b12
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b11: ; preds = %b10
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unreachable
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b12: ; preds = %b10
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"short", !2}
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!2 = !{!"omnipotent char", !3}
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!3 = !{!"Simple C/C++ TBAA"}
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