forked from OSchip/llvm-project
121 lines
5.4 KiB
ArmAsm
121 lines
5.4 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=SANDY
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=ivybridge -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=IVY
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=HASWELL
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDWELL
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=SKYLAKE
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BTVER2
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1
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vaddps %xmm0, %xmm0, %xmm1
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vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# ALL: Iterations: 1
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# ALL-NEXT: Instructions: 2
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# BDWELL-NEXT: Total Cycles: 10
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# BDWELL-NEXT: Dispatch Width: 4
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# BDWELL-NEXT: IPC: 0.20
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# BDWELL-NEXT: Block RThroughput: 2.0
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# BTVER2-NEXT: Total Cycles: 11
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# BTVER2-NEXT: Dispatch Width: 2
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# BTVER2-NEXT: IPC: 0.18
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# BTVER2-NEXT: Block RThroughput: 2.0
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# HASWELL-NEXT: Total Cycles: 11
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# HASWELL-NEXT: Dispatch Width: 4
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# HASWELL-NEXT: IPC: 0.18
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# HASWELL-NEXT: Block RThroughput: 2.0
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# IVY-NEXT: Total Cycles: 11
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# IVY-NEXT: Dispatch Width: 4
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# IVY-NEXT: IPC: 0.18
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# IVY-NEXT: Block RThroughput: 1.0
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# SANDY-NEXT: Total Cycles: 11
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# SANDY-NEXT: Dispatch Width: 4
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# SANDY-NEXT: IPC: 0.18
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# SANDY-NEXT: Block RThroughput: 1.0
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# SKYLAKE-NEXT: Total Cycles: 11
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# SKYLAKE-NEXT: Dispatch Width: 6
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# SKYLAKE-NEXT: IPC: 0.18
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# SKYLAKE-NEXT: Block RThroughput: 0.7
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# ZNVER1-NEXT: Total Cycles: 11
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# ZNVER1-NEXT: Dispatch Width: 4
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# ZNVER1-NEXT: IPC: 0.18
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# ZNVER1-NEXT: Block RThroughput: 1.0
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# BTVER2: Timeline view:
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# BTVER2-NEXT: 0
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# BTVER2-NEXT: Index 0123456789
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# HASWELL: Timeline view:
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# HASWELL-NEXT: 0
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# HASWELL-NEXT: Index 0123456789
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# IVY: Timeline view:
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# IVY-NEXT: 0
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# IVY-NEXT: Index 0123456789
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# SANDY: Timeline view:
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# SANDY-NEXT: 0
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# SANDY-NEXT: Index 0123456789
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# SKYLAKE: Timeline view:
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# SKYLAKE-NEXT: 0
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# SKYLAKE-NEXT: Index 0123456789
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# ZNVER1: Timeline view:
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# ZNVER1-NEXT: 0
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# ZNVER1-NEXT: Index 0123456789
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# BDWELL: Timeline view:
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# BDWELL-NEXT: Index 0123456789
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# BTVER2: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1
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# BTVER2-NEXT: [0,1] .DeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# HASWELL: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1
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# HASWELL-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# IVY: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1
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# IVY-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# SANDY: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1
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# SANDY-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# ZNVER1: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1
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# ZNVER1-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# BDWELL: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1
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# BDWELL-NEXT: [0,1] DeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# SKYLAKE: [0,0] DeeeeER . vaddps %xmm0, %xmm0, %xmm1
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# SKYLAKE-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# ALL: Average Wait times (based on the timeline view):
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# ALL-NEXT: [0]: Executions
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# ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue
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# ALL-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
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# ALL-NEXT: [3]: Average time elapsed from WB until retire stage
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# ALL: [0] [1] [2] [3]
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# ALL-NEXT: 0. 1 1.0 1.0 0.0 vaddps %xmm0, %xmm0, %xmm1
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# BDWELL-NEXT: 1. 1 1.0 0.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# BTVER2-NEXT: 1. 1 1.0 1.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# HASWELL-NEXT: 1. 1 1.0 0.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# IVY-NEXT: 1. 1 1.0 0.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# SANDY-NEXT: 1. 1 1.0 0.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# SKYLAKE-NEXT: 1. 1 1.0 0.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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# ZNVER1-NEXT: 1. 1 1.0 0.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3
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