forked from OSchip/llvm-project
51 lines
2.1 KiB
ArmAsm
51 lines
2.1 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
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lzcntw %cx, %cx
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lzcntw (%rax), %cx
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lzcntl %eax, %ecx
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lzcntl (%rax), %ecx
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lzcntq %rax, %rcx
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lzcntq (%rax), %rcx
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
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# CHECK-NEXT: 1 3 1.00 lzcntw %cx, %cx
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# CHECK-NEXT: 2 8 1.00 * lzcntw (%rax), %cx
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# CHECK-NEXT: 1 3 1.00 lzcntl %eax, %ecx
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# CHECK-NEXT: 2 8 1.00 * lzcntl (%rax), %ecx
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# CHECK-NEXT: 1 3 1.00 lzcntq %rax, %rcx
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# CHECK-NEXT: 2 8 1.00 * lzcntq (%rax), %rcx
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# CHECK: Resources:
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# CHECK-NEXT: [0] - SBDivider
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# CHECK-NEXT: [1] - SBFPDivider
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# CHECK-NEXT: [2] - SBPort0
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# CHECK-NEXT: [3] - SBPort1
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# CHECK-NEXT: [4] - SBPort4
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# CHECK-NEXT: [5] - SBPort5
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# CHECK-NEXT: [6.0] - SBPort23
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# CHECK-NEXT: [6.1] - SBPort23
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
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# CHECK-NEXT: - - - 6.00 - - 1.50 1.50
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
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# CHECK-NEXT: - - - 1.00 - - - - lzcntw %cx, %cx
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# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 lzcntw (%rax), %cx
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# CHECK-NEXT: - - - 1.00 - - - - lzcntl %eax, %ecx
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# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 lzcntl (%rax), %ecx
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# CHECK-NEXT: - - - 1.00 - - - - lzcntq %rax, %rcx
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# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 lzcntq (%rax), %rcx
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