forked from OSchip/llvm-project
338 lines
11 KiB
LLVM
338 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; rdar://5992453
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; A & 255
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define i32 @test4(i32 %a) nounwind {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 %a, 255
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%tmp2 = tail call i32 @llvm.bswap.i32( i32 %a )
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%tmp4 = lshr i32 %tmp2, 24
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ret i32 %tmp4
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}
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; a >> 24
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define i32 @test6(i32 %a) nounwind {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 %a, 24
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%tmp2 = tail call i32 @llvm.bswap.i32( i32 %a )
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%tmp4 = and i32 %tmp2, 255
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ret i32 %tmp4
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}
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; PR5284
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define i16 @test7(i32 %A) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 %A, 16
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; CHECK-NEXT: [[D:%.*]] = trunc i32 [[TMP1]] to i16
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; CHECK-NEXT: ret i16 [[D]]
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;
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%B = tail call i32 @llvm.bswap.i32(i32 %A) nounwind
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%C = trunc i32 %B to i16
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%D = tail call i16 @llvm.bswap.i16(i16 %C) nounwind
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ret i16 %D
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}
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define i16 @test8(i64 %A) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 %A, 48
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; CHECK-NEXT: [[D:%.*]] = trunc i64 [[TMP1]] to i16
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; CHECK-NEXT: ret i16 [[D]]
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;
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%B = tail call i64 @llvm.bswap.i64(i64 %A) nounwind
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%C = trunc i64 %B to i16
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%D = tail call i16 @llvm.bswap.i16(i16 %C) nounwind
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ret i16 %D
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}
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; Misc: Fold bswap(undef) to undef.
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define i64 @foo() {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: ret i64 undef
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;
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%a = call i64 @llvm.bswap.i64(i64 undef)
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ret i64 %a
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}
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; PR15782
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; Fold: OP( BSWAP(x), BSWAP(y) ) -> BSWAP( OP(x, y) )
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; Fold: OP( BSWAP(x), CONSTANT ) -> BSWAP( OP(x, BSWAP(CONSTANT) ) )
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define i16 @bs_and16i(i16 %a, i16 %b) #0 {
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; CHECK-LABEL: @bs_and16i(
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; CHECK-NEXT: [[TMP1:%.*]] = and i16 %a, 4391
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; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP1]])
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; CHECK-NEXT: ret i16 [[TMP2]]
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;
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%1 = tail call i16 @llvm.bswap.i16(i16 %a)
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%2 = and i16 %1, 10001
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ret i16 %2
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}
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define i16 @bs_and16(i16 %a, i16 %b) #0 {
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; CHECK-LABEL: @bs_and16(
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; CHECK-NEXT: [[TMP1:%.*]] = and i16 %a, %b
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; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP1]])
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; CHECK-NEXT: ret i16 [[TMP2]]
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;
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%tmp1 = tail call i16 @llvm.bswap.i16(i16 %a)
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%tmp2 = tail call i16 @llvm.bswap.i16(i16 %b)
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%tmp3 = and i16 %tmp1, %tmp2
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ret i16 %tmp3
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}
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define i16 @bs_or16(i16 %a, i16 %b) #0 {
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; CHECK-LABEL: @bs_or16(
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; CHECK-NEXT: [[TMP1:%.*]] = or i16 %a, %b
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; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP1]])
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; CHECK-NEXT: ret i16 [[TMP2]]
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;
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%tmp1 = tail call i16 @llvm.bswap.i16(i16 %a)
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%tmp2 = tail call i16 @llvm.bswap.i16(i16 %b)
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%tmp3 = or i16 %tmp1, %tmp2
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ret i16 %tmp3
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}
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define i16 @bs_xor16(i16 %a, i16 %b) #0 {
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; CHECK-LABEL: @bs_xor16(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i16 %a, %b
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; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP1]])
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; CHECK-NEXT: ret i16 [[TMP2]]
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;
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%tmp1 = tail call i16 @llvm.bswap.i16(i16 %a)
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%tmp2 = tail call i16 @llvm.bswap.i16(i16 %b)
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%tmp3 = xor i16 %tmp1, %tmp2
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ret i16 %tmp3
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}
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define i32 @bs_and32i(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: @bs_and32i(
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, -1585053440
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%tmp1 = tail call i32 @llvm.bswap.i32(i32 %a)
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%tmp2 = and i32 %tmp1, 100001
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ret i32 %tmp2
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}
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define i32 @bs_and32(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: @bs_and32(
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, %b
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%tmp1 = tail call i32 @llvm.bswap.i32(i32 %a)
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%tmp2 = tail call i32 @llvm.bswap.i32(i32 %b)
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%tmp3 = and i32 %tmp1, %tmp2
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ret i32 %tmp3
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}
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define i32 @bs_or32(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: @bs_or32(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 %a, %b
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%tmp1 = tail call i32 @llvm.bswap.i32(i32 %a)
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%tmp2 = tail call i32 @llvm.bswap.i32(i32 %b)
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%tmp3 = or i32 %tmp1, %tmp2
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ret i32 %tmp3
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}
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define i32 @bs_xor32(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: @bs_xor32(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i32 %a, %b
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%tmp1 = tail call i32 @llvm.bswap.i32(i32 %a)
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%tmp2 = tail call i32 @llvm.bswap.i32(i32 %b)
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%tmp3 = xor i32 %tmp1, %tmp2
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ret i32 %tmp3
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}
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define i64 @bs_and64i(i64 %a, i64 %b) #0 {
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; CHECK-LABEL: @bs_and64i(
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; CHECK-NEXT: [[TMP1:%.*]] = and i64 %a, 129085117527228416
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP1]])
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; CHECK-NEXT: ret i64 [[TMP2]]
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;
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%tmp1 = tail call i64 @llvm.bswap.i64(i64 %a)
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%tmp2 = and i64 %tmp1, 1000000001
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ret i64 %tmp2
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}
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define i64 @bs_and64(i64 %a, i64 %b) #0 {
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; CHECK-LABEL: @bs_and64(
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; CHECK-NEXT: [[TMP1:%.*]] = and i64 %a, %b
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP1]])
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; CHECK-NEXT: ret i64 [[TMP2]]
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;
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%tmp1 = tail call i64 @llvm.bswap.i64(i64 %a)
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%tmp2 = tail call i64 @llvm.bswap.i64(i64 %b)
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%tmp3 = and i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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define i64 @bs_or64(i64 %a, i64 %b) #0 {
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; CHECK-LABEL: @bs_or64(
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; CHECK-NEXT: [[TMP1:%.*]] = or i64 %a, %b
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP1]])
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; CHECK-NEXT: ret i64 [[TMP2]]
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;
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%tmp1 = tail call i64 @llvm.bswap.i64(i64 %a)
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%tmp2 = tail call i64 @llvm.bswap.i64(i64 %b)
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%tmp3 = or i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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define i64 @bs_xor64(i64 %a, i64 %b) #0 {
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; CHECK-LABEL: @bs_xor64(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i64 %a, %b
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP1]])
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; CHECK-NEXT: ret i64 [[TMP2]]
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;
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%tmp1 = tail call i64 @llvm.bswap.i64(i64 %a)
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%tmp2 = tail call i64 @llvm.bswap.i64(i64 %b)
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%tmp3 = xor i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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define <2 x i32> @bs_and32vec(<2 x i32> %a, <2 x i32> %b) #0 {
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; CHECK-LABEL: @bs_and32vec(
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; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP1]])
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; CHECK-NEXT: ret <2 x i32> [[TMP2]]
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;
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%tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a)
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%tmp2 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %b)
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%tmp3 = and <2 x i32> %tmp1, %tmp2
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ret <2 x i32> %tmp3
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}
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define <2 x i32> @bs_or32vec(<2 x i32> %a, <2 x i32> %b) #0 {
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; CHECK-LABEL: @bs_or32vec(
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; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP1]])
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; CHECK-NEXT: ret <2 x i32> [[TMP2]]
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;
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%tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a)
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%tmp2 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %b)
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%tmp3 = or <2 x i32> %tmp1, %tmp2
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ret <2 x i32> %tmp3
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}
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define <2 x i32> @bs_xor32vec(<2 x i32> %a, <2 x i32> %b) #0 {
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; CHECK-LABEL: @bs_xor32vec(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP1]])
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; CHECK-NEXT: ret <2 x i32> [[TMP2]]
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;
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%tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a)
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%tmp2 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %b)
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%tmp3 = xor <2 x i32> %tmp1, %tmp2
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ret <2 x i32> %tmp3
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}
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define <2 x i32> @bs_and32ivec(<2 x i32> %a, <2 x i32> %b) #0 {
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; CHECK-LABEL: @bs_and32ivec(
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; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], <i32 -1585053440, i32 -1585053440>
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; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP1]])
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; CHECK-NEXT: ret <2 x i32> [[TMP2]]
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;
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%tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a)
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%tmp2 = and <2 x i32> %tmp1, <i32 100001, i32 100001>
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ret <2 x i32> %tmp2
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}
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define <2 x i32> @bs_or32ivec(<2 x i32> %a, <2 x i32> %b) #0 {
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; CHECK-LABEL: @bs_or32ivec(
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; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[A:%.*]], <i32 -1585053440, i32 -1585053440>
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; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP1]])
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; CHECK-NEXT: ret <2 x i32> [[TMP2]]
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;
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%tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a)
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%tmp2 = or <2 x i32> %tmp1, <i32 100001, i32 100001>
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ret <2 x i32> %tmp2
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}
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define <2 x i32> @bs_xor32ivec(<2 x i32> %a, <2 x i32> %b) #0 {
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; CHECK-LABEL: @bs_xor32ivec(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[A:%.*]], <i32 -1585053440, i32 -1585053440>
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; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP1]])
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; CHECK-NEXT: ret <2 x i32> [[TMP2]]
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;
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%tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a)
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%tmp2 = xor <2 x i32> %tmp1, <i32 100001, i32 100001>
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ret <2 x i32> %tmp2
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}
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define i64 @bs_and64_multiuse1(i64 %a, i64 %b) #0 {
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; CHECK-LABEL: @bs_and64_multiuse1(
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; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bswap.i64(i64 [[A:%.*]])
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; CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.bswap.i64(i64 [[B:%.*]])
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; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP1]], [[TMP2]]
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; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], [[TMP1]]
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; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], [[TMP2]]
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; CHECK-NEXT: ret i64 [[TMP5]]
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;
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%tmp1 = tail call i64 @llvm.bswap.i64(i64 %a)
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%tmp2 = tail call i64 @llvm.bswap.i64(i64 %b)
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%tmp3 = and i64 %tmp1, %tmp2
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%tmp4 = mul i64 %tmp3, %tmp1 ; to increase use count of the bswaps
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%tmp5 = mul i64 %tmp4, %tmp2 ; to increase use count of the bswaps
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ret i64 %tmp5
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}
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define i64 @bs_and64_multiuse2(i64 %a, i64 %b) #0 {
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; CHECK-LABEL: @bs_and64_multiuse2(
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; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bswap.i64(i64 [[A:%.*]])
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; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[A]], [[B:%.*]]
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; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
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; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], [[TMP1]]
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; CHECK-NEXT: ret i64 [[TMP4]]
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;
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%tmp1 = tail call i64 @llvm.bswap.i64(i64 %a)
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%tmp2 = tail call i64 @llvm.bswap.i64(i64 %b)
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%tmp3 = and i64 %tmp1, %tmp2
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%tmp4 = mul i64 %tmp3, %tmp1 ; to increase use count of the bswaps
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ret i64 %tmp4
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}
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define i64 @bs_and64_multiuse3(i64 %a, i64 %b) #0 {
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; CHECK-LABEL: @bs_and64_multiuse3(
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; CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.bswap.i64(i64 [[B:%.*]])
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; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[A:%.*]], [[B]]
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; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP1]])
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; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], [[TMP2]]
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; CHECK-NEXT: ret i64 [[TMP4]]
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;
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%tmp1 = tail call i64 @llvm.bswap.i64(i64 %a)
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%tmp2 = tail call i64 @llvm.bswap.i64(i64 %b)
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%tmp3 = and i64 %tmp1, %tmp2
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%tmp4 = mul i64 %tmp3, %tmp2 ; to increase use count of the bswaps
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ret i64 %tmp4
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}
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define i64 @bs_and64i_multiuse(i64 %a, i64 %b) #0 {
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; CHECK-LABEL: @bs_and64i_multiuse(
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; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bswap.i64(i64 [[A:%.*]])
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; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], 1000000001
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; CHECK-NEXT: [[TMP3:%.*]] = mul i64 [[TMP2]], [[TMP1]]
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; CHECK-NEXT: ret i64 [[TMP3]]
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;
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%tmp1 = tail call i64 @llvm.bswap.i64(i64 %a)
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%tmp2 = and i64 %tmp1, 1000000001
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%tmp3 = mul i64 %tmp2, %tmp1 ; to increase use count of the bswap
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ret i64 %tmp3
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}
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declare i16 @llvm.bswap.i16(i16)
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declare i32 @llvm.bswap.i32(i32)
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declare i64 @llvm.bswap.i64(i64)
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declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>)
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