forked from OSchip/llvm-project
235 lines
11 KiB
LLVM
235 lines
11 KiB
LLVM
; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -early-cse | FileCheck %s
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; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -basicaa -early-cse-memssa | FileCheck %s
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; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -passes=early-cse | FileCheck %s
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; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -aa-pipeline=basic-aa -passes=early-cse-memssa | FileCheck %s
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define <4 x i32> @test_cse(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) {
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entry:
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; Check that @llvm.aarch64.neon.ld2 is optimized away by Early CSE.
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; CHECK-LABEL: @test_cse
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; CHECK-NOT: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8
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%s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
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%s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
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%cmp = icmp slt i32 %i.0, %n
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%0 = bitcast i32* %a to i8*
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%1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
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%2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
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%3 = bitcast <16 x i8> %1 to <4 x i32>
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%4 = bitcast <16 x i8> %2 to <4 x i32>
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call void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32> %3, <4 x i32> %4, i8* %0)
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%5 = bitcast i32* %a to i8*
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%vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8(i8* %5)
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%vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
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%vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
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%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld2.fca.0.extract)
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%inc = add nsw i32 %i.0, 1
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br label %for.cond
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for.end: ; preds = %for.cond
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ret <4 x i32> %res.0
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}
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define <4 x i32> @test_cse2(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) {
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entry:
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; Check that the first @llvm.aarch64.neon.st2 is optimized away by Early CSE.
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; CHECK-LABEL: @test_cse2
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; CHECK-NOT: call void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32> %3, <4 x i32> %3, i8* %0)
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; CHECK: call void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32> %s.coerce.fca.0.extract, <4 x i32> %s.coerce.fca.1.extract, i8* %0)
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%s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
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%s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
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%cmp = icmp slt i32 %i.0, %n
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%0 = bitcast i32* %a to i8*
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%1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
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%2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
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%3 = bitcast <16 x i8> %1 to <4 x i32>
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%4 = bitcast <16 x i8> %2 to <4 x i32>
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call void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32> %3, <4 x i32> %3, i8* %0)
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call void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32> %3, <4 x i32> %4, i8* %0)
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%5 = bitcast i32* %a to i8*
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%vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8(i8* %5)
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%vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
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%vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
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%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld2.fca.0.extract)
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%inc = add nsw i32 %i.0, 1
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br label %for.cond
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for.end: ; preds = %for.cond
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ret <4 x i32> %res.0
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}
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define <4 x i32> @test_cse3(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) #0 {
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entry:
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; Check that the first @llvm.aarch64.neon.ld2 is optimized away by Early CSE.
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; CHECK-LABEL: @test_cse3
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; CHECK: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8
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; CHECK-NOT: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8
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%s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
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%s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
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%cmp = icmp slt i32 %i.0, %n
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%0 = bitcast i32* %a to i8*
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%vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8(i8* %0)
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%vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
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%vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
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%1 = bitcast i32* %a to i8*
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%vld22 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8(i8* %1)
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%vld22.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld22, 0
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%vld22.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld22, 1
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%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld22.fca.0.extract)
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%inc = add nsw i32 %i.0, 1
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br label %for.cond
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for.end: ; preds = %for.cond
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ret <4 x i32> %res.0
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}
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define <4 x i32> @test_nocse(i32* %a, i32* %b, [2 x <4 x i32>] %s.coerce, i32 %n) {
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entry:
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; Check that the store prevents @llvm.aarch64.neon.ld2 from being optimized
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; away by Early CSE.
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; CHECK-LABEL: @test_nocse
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; CHECK: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8
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%s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
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%s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
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%cmp = icmp slt i32 %i.0, %n
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%0 = bitcast i32* %a to i8*
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%1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
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%2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
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%3 = bitcast <16 x i8> %1 to <4 x i32>
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%4 = bitcast <16 x i8> %2 to <4 x i32>
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call void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32> %3, <4 x i32> %4, i8* %0)
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store i32 0, i32* %b, align 4
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%5 = bitcast i32* %a to i8*
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%vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8(i8* %5)
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%vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
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%vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
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%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld2.fca.0.extract)
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%inc = add nsw i32 %i.0, 1
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br label %for.cond
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for.end: ; preds = %for.cond
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ret <4 x i32> %res.0
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}
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define <4 x i32> @test_nocse2(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) {
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entry:
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; Check that @llvm.aarch64.neon.ld3 is not optimized away by Early CSE due
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; to mismatch between st2 and ld3.
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; CHECK-LABEL: @test_nocse2
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; CHECK: call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0i8
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%s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
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%s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
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%cmp = icmp slt i32 %i.0, %n
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%0 = bitcast i32* %a to i8*
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%1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
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%2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
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%3 = bitcast <16 x i8> %1 to <4 x i32>
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%4 = bitcast <16 x i8> %2 to <4 x i32>
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call void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32> %3, <4 x i32> %4, i8* %0)
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%5 = bitcast i32* %a to i8*
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%vld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0i8(i8* %5)
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%vld3.fca.0.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld3, 0
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%vld3.fca.2.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld3, 2
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%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld3.fca.0.extract, <4 x i32> %vld3.fca.2.extract)
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%inc = add nsw i32 %i.0, 1
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br label %for.cond
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for.end: ; preds = %for.cond
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ret <4 x i32> %res.0
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}
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define <4 x i32> @test_nocse3(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) {
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entry:
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; Check that @llvm.aarch64.neon.st3 is not optimized away by Early CSE due to
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; mismatch between st2 and st3.
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; CHECK-LABEL: @test_nocse3
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; CHECK: call void @llvm.aarch64.neon.st3.v4i32.p0i8
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; CHECK: call void @llvm.aarch64.neon.st2.v4i32.p0i8
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%s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
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%s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
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%cmp = icmp slt i32 %i.0, %n
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%0 = bitcast i32* %a to i8*
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%1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
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%2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
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%3 = bitcast <16 x i8> %1 to <4 x i32>
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%4 = bitcast <16 x i8> %2 to <4 x i32>
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call void @llvm.aarch64.neon.st3.v4i32.p0i8(<4 x i32> %4, <4 x i32> %3, <4 x i32> %3, i8* %0)
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call void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32> %3, <4 x i32> %3, i8* %0)
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%5 = bitcast i32* %a to i8*
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%vld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0i8(i8* %5)
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%vld3.fca.0.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld3, 0
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%vld3.fca.1.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld3, 1
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%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld3.fca.0.extract, <4 x i32> %vld3.fca.0.extract)
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%inc = add nsw i32 %i.0, 1
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br label %for.cond
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for.end: ; preds = %for.cond
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ret <4 x i32> %res.0
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}
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; Function Attrs: nounwind
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declare void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32>, <4 x i32>, i8* nocapture)
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; Function Attrs: nounwind
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declare void @llvm.aarch64.neon.st3.v4i32.p0i8(<4 x i32>, <4 x i32>, <4 x i32>, i8* nocapture)
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; Function Attrs: nounwind readonly
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declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8(i8*)
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; Function Attrs: nounwind readonly
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declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0i8(i8*)
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define internal fastcc <4 x i32> @vaddq_s32(<4 x i32> %__p0, <4 x i32> %__p1) {
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entry:
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%add = add <4 x i32> %__p0, %__p1
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ret <4 x i32> %add
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}
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