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addc-adde-sube-subc.ll
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[RISCV] Implement frame pointer elimination
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2018-01-18 11:34:02 +00:00 |
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align.ll
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[RISCV] Change function alignment to 4 bytes, and 2 bytes for RVC
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2018-04-12 11:30:59 +00:00 |
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alloca.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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alu32.ll
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[RISCV] Expand codegen -> compression sanity checks and move to a single file
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2018-04-18 20:17:29 +00:00 |
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analyze-branch.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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arith-with-overflow.ll
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[RISCV] Add tests for overflow intrinsics
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2018-06-19 06:45:47 +00:00 |
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atomic-cmpxchg.ll
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[RISCV] Codegen support for atomic operations on RV32I
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2018-06-13 11:58:46 +00:00 |
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atomic-fence.ll
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[RISCV] Codegen support for atomic operations on RV32I
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2018-06-13 11:58:46 +00:00 |
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atomic-load-store.ll
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[RISCV] Add codegen support for atomic load/stores with RV32A
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2018-06-13 12:04:51 +00:00 |
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atomic-rmw.ll
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[RISCV] Codegen support for atomic operations on RV32I
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2018-06-13 11:58:46 +00:00 |
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bare-select.ll
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[RISCV] Codegen support for RV32F floating point comparison operations
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2018-03-21 15:11:02 +00:00 |
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blockaddress.ll
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[RISCV] Peephole optimisation for load/store of global values or constant addresses
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2018-03-19 11:54:28 +00:00 |
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branch-relaxation.ll
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[RISCV] Implement frame pointer elimination
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2018-01-18 11:34:02 +00:00 |
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branch.ll
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[RISCV] Expand codegen -> compression sanity checks and move to a single file
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2018-04-18 20:17:29 +00:00 |
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bswap-ctlz-cttz-ctpop.ll
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[RISCV] Set CostPerUse for registers
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2018-05-23 21:34:30 +00:00 |
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byval.ll
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[RISCV] Separate base from offset in lowerGlobalAddress
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2018-05-17 18:14:53 +00:00 |
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calling-conv-sext-zext.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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calling-conv.ll
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[RISCV] Set CostPerUse for registers
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2018-05-23 21:34:30 +00:00 |
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calls.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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compress-inline-asm.ll
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[RISCV] Tablegen-driven Instruction Compression.
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2018-04-06 21:07:05 +00:00 |
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compress.ll
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[RISCV] Add test changes missed from rL330293
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2018-04-18 20:36:12 +00:00 |
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disable-tail-calls.ll
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[RISCV] Lower the tail pseudoinstruction
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2018-05-23 22:44:08 +00:00 |
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div.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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double-arith.ll
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[RISCV] Add codegen support for RV32D floating point arithmetic operations
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2018-04-12 05:42:42 +00:00 |
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double-br-fcmp.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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double-calling-conv.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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double-convert.ll
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[RISCV] Codegen support for RV32D floating point conversion operations
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2018-04-12 05:47:15 +00:00 |
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double-fcmp.ll
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[RISCV] Codegen support for RV32D floating point comparison operations
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2018-04-12 05:50:06 +00:00 |
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double-imm.ll
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[RISCV] Add tests missed in r329871
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2018-04-12 05:36:44 +00:00 |
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double-intrinsics.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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double-mem.ll
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[RISCV] Set CostPerUse for registers
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2018-05-23 21:34:30 +00:00 |
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double-previous-failure.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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double-select-fcmp.ll
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[RISCV] Codegen support for RV32D floating point comparison operations
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2018-04-12 05:50:06 +00:00 |
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double-stack-spill-restore.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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float-arith.ll
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[RISCV] Introduce pattern for materialising immediates with 0 for lower 12 bits
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2018-04-18 20:34:23 +00:00 |
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float-br-fcmp.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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float-convert.ll
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[RISCV] Add codegen for RV32F arithmetic and conversion operations
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2018-03-20 12:45:35 +00:00 |
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float-fcmp.ll
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[RISCV] Codegen support for RV32F floating point comparison operations
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2018-03-21 15:11:02 +00:00 |
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float-imm.ll
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[RISCV] Add codegen for RV32F floating point load/store
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2018-03-20 13:26:12 +00:00 |
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float-mem.ll
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[RISCV] Separate base from offset in lowerGlobalAddress
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2018-05-17 18:14:53 +00:00 |
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float-select-fcmp.ll
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[RISCV] Codegen support for RV32F floating point comparison operations
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2018-03-21 15:11:02 +00:00 |
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fp128.ll
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[RISCV] Separate base from offset in lowerGlobalAddress
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2018-05-17 18:14:53 +00:00 |
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frame.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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frameaddr-returnaddr.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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get-setcc-result-type.ll
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[RISCV] Define getSetCCResultType for setting vector setCC type
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2018-02-02 02:43:18 +00:00 |
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hoist-global-addr-base.ll
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[RISCV] Add machine function pass to merge base + offset
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2018-06-27 20:51:42 +00:00 |
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i32-icmp.ll
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[RISCV] Implement frame pointer elimination
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2018-01-18 11:34:02 +00:00 |
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imm-cse.ll
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[RISCV] Add imm-cse.ll test case
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2018-04-18 20:25:07 +00:00 |
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imm.ll
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[RISCV] Introduce pattern for materialising immediates with 0 for lower 12 bits
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2018-04-18 20:34:23 +00:00 |
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indirectbr.ll
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[RISC-V] Fix a test case to not include label names as those aren't
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2018-06-21 05:42:05 +00:00 |
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init-array.ll
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[RISCV] Use init_array instead of ctors for RISCV target, by default
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2018-03-24 18:37:19 +00:00 |
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inline-asm.ll
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[RISCV] Peephole optimisation for load/store of global values or constant addresses
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2018-03-19 11:54:28 +00:00 |
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interrupt-attr-args-error.ll
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[RISCV] Add support for _interrupt attribute
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2018-07-26 17:49:43 +00:00 |
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interrupt-attr-invalid.ll
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[RISCV] Add support for _interrupt attribute
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2018-07-26 17:49:43 +00:00 |
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interrupt-attr-nocall.ll
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[RISCV] Add support for _interrupt attribute
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2018-07-26 17:49:43 +00:00 |
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interrupt-attr-ret-error.ll
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[RISCV] Add support for _interrupt attribute
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2018-07-26 17:49:43 +00:00 |
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interrupt-attr.ll
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[RISCV] Add support for _interrupt attribute
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2018-07-26 17:49:43 +00:00 |
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jumptable.ll
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[RISCV] Implement frame pointer elimination
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2018-01-18 11:34:02 +00:00 |
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large-stack.ll
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[RISCV] Implement frame pointer elimination
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2018-01-18 11:34:02 +00:00 |
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lit.local.cfg
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…
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lsr-legaladdimm.ll
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[RISCV] Implement isLegalAddImmediate
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2018-04-26 13:00:37 +00:00 |
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mem.ll
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[RISCV] Separate base from offset in lowerGlobalAddress
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2018-05-17 18:14:53 +00:00 |
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mul.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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musttail-call.ll
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[RISCV] Lower the tail pseudoinstruction
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2018-05-23 22:44:08 +00:00 |
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option-norvc.ll
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[RISCV] Support .option rvc and norvc assembler directives
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2018-05-11 17:30:28 +00:00 |
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option-rvc.ll
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[RISCV] Support .option rvc and norvc assembler directives
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2018-05-11 17:30:28 +00:00 |
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rem.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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remat.ll
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[RISCV] Set CostPerUse for registers
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2018-05-23 21:34:30 +00:00 |
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rotl-rotr.ll
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[RISCV] Implement frame pointer elimination
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2018-01-18 11:34:02 +00:00 |
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select-cc.ll
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[RISCV] Implement frame pointer elimination
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2018-01-18 11:34:02 +00:00 |
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sext-zext-trunc.ll
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[RISCV] Implement frame pointer elimination
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2018-01-18 11:34:02 +00:00 |
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shifts.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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tail-calls.ll
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[RISCV] Fixed test case failure due to r338047
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2018-07-31 00:36:28 +00:00 |
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vararg.ll
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[RISCV] Expand function call to "call" pseudoinstruction
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2018-04-25 14:19:12 +00:00 |
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wide-mem.ll
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[RISCV] Separate base from offset in lowerGlobalAddress
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2018-05-17 18:14:53 +00:00 |
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zext-with-load-is-free.ll
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[RISCV] Separate base from offset in lowerGlobalAddress
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2018-05-17 18:14:53 +00:00 |
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