forked from OSchip/llvm-project
62 lines
2.1 KiB
LLVM
62 lines
2.1 KiB
LLVM
; RUN: opt %loadPolly -polly-codegen -polly-invariant-load-hoisting=true -polly-ignore-aliasing -polly-process-unprofitable -S < %s | FileCheck %s
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;
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; CHECK-LABEL: polly.preload.begin:
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; CHECK-NEXT: %0 = sext i32 %N to i64
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; CHECK-NEXT: %1 = icmp sge i64 %0, 514
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; CHECK-NEXT: br label %polly.preload.cond
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;
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; CHECK-LABEL: polly.preload.cond:
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; CHECK-NEXT: br i1 %1, label %polly.preload.exec, label %polly.preload.merge
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;
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; CHECK-LABEL: polly.preload.merge:
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; CHECK-NEXT: %polly.preload.tmp6.merge = phi i32* [ %polly.access.BPLoc.load, %polly.preload.exec ], [ null, %polly.preload.cond ]
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;
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; CHECK-LABEL: polly.stmt.bb5:
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; CHECK-NEXT: %p_tmp7 = getelementptr inbounds i32, i32* %polly.preload.tmp6.merge, i64 %polly.indvar6
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;
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; void f(int **BPLoc, int *A, int N) {
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; for (int i = 0; i < N; i++)
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; if (i > 512)
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; (*BPLoc)[i] = 0;
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; else
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; A[i] = 0;
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; }
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @f(i32** %BPLoc, i32* %A, i32 %N) {
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bb:
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%tmp = sext i32 %N to i64
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br label %bb1
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bb1: ; preds = %bb11, %bb
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%indvars.iv = phi i64 [ %indvars.iv.next, %bb11 ], [ 0, %bb ]
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%tmp2 = icmp slt i64 %indvars.iv, %tmp
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br i1 %tmp2, label %bb3, label %bb12
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bb3: ; preds = %bb1
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%tmp4 = icmp sgt i64 %indvars.iv, 512
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br i1 %tmp4, label %bb5, label %bb8
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bb5: ; preds = %bb3
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%tmp6 = load i32*, i32** %BPLoc, align 8
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%tmp7 = getelementptr inbounds i32, i32* %tmp6, i64 %indvars.iv
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store i32 0, i32* %tmp7, align 4
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br label %bb10
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bb8: ; preds = %bb3
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%tmp9 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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store i32 0, i32* %tmp9, align 4
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br label %bb10
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bb10: ; preds = %bb8, %bb5
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br label %bb11
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bb11: ; preds = %bb10
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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br label %bb1
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bb12: ; preds = %bb1
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ret void
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}
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