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AArch64
[AArch64] Enable FeatureFuseAES on Cortex-A53.
2017-05-31 15:50:03 +00:00
AMDGPU
[AMDGPU] Fix bugs in new waitcnt pass. Add test.
2017-05-31 16:44:23 +00:00
ARM
ARM: Fix cmpxchg O0 expansion
2017-05-31 01:21:35 +00:00
AVR
[AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo Erdi
2017-05-31 06:27:46 +00:00
BPF
[bpf] fix a bug which causes incorrect big endian reloc fixup
2017-05-05 18:05:00 +00:00
Generic
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
Hexagon
[Hexagon] Improve code generation for 32x32-bit multiplication
2017-05-30 17:47:51 +00:00
Inputs
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Lanai
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
MIR
TargetMachine: Indicate whether machine verifier passes.
2017-05-31 18:41:23 +00:00
MSP430
[MSP430] Fix PR33050: Don't use ADD16ri to lower FrameIndex.
2017-05-24 15:08:30 +00:00
Mips
MIR: remove explicit "noVRegs" property.
2017-05-30 21:28:57 +00:00
NVPTX
Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."
2017-05-18 18:50:05 +00:00
Nios2
[Nios2] Target registration
2017-05-29 09:48:30 +00:00
PowerPC
[PowerPC] Correctly specify the cache line size for Power 7, 8 and 9.
2017-05-31 18:20:17 +00:00
SPARC
Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."
2017-05-18 18:50:05 +00:00
SystemZ
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
Thumb
Move machine-cse-physreg.mir to test/CodeGen/Thumb
2017-05-24 17:20:47 +00:00
Thumb2
MIR: remove explicit "noVRegs" property.
2017-05-30 21:28:57 +00:00
WebAssembly
[wasm] Fix test after r304117.
2017-05-29 16:32:52 +00:00
WinEH
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X86
[ScheduleDAG] Deal with already scheduled loads in ScheduleDAG.
2017-05-31 18:43:17 +00:00
XCore
AsmPrinter: mark the beginning and the end of a function in verbose mode
2017-05-23 21:22:16 +00:00