llvm-project/llvm/lib/Target/ARM/AsmParser
Mikhail Maltsev ee81051fc9 [ARM] Relax constraints on operands of VQxDMLxDH instructions
Summary:
According to a recently updated Armv8-M spec
(https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf) the
32-bit width versions of the following instructions:
* VQDMLADH
* VQDMLADHX
* VQRDMLADH
* VQRDMLADHX
* VQDMLSDH
* VQDMLSDHX
* VQRDMLSDH
* VQRDMLSDHX
are no longer unpredictable when their output register is the same as
one of the input registers.

This patch updates the assembler parser and the corresponding tests
and also removes @earlyclobber from the instruction constraints.

Reviewers: simon_tatham, ostannard, dmgreen, SjoerdMeijer, samparker

Reviewed By: simon_tatham

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64250

llvm-svn: 365306
2019-07-08 09:44:52 +00:00
..
ARMAsmParser.cpp [ARM] Relax constraints on operands of VQxDMLxDH instructions 2019-07-08 09:44:52 +00:00
CMakeLists.txt
LLVMBuild.txt [ARM] Move InstPrinter files to MCTargetDesc. NFC 2019-05-11 00:34:07 +00:00