forked from OSchip/llvm-project
239 lines
11 KiB
LLVM
239 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx512vl,+avx512dq | FileCheck %s --check-prefix=CHECK
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define <4 x i32> @mask_shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b, <4 x i32> %passthru, i8 %mask) {
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; CHECK-LABEL: mask_shuffle_v4i32_1234:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignd {{.*#+}} xmm2 {%k1} = xmm0[1,2,3],xmm1[0]
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; CHECK-NEXT: vmovdqa64 %xmm2, %xmm0
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; CHECK-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%res = select <4 x i1> %mask.extract, <4 x i32> %shuffle, <4 x i32> %passthru
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ret <4 x i32> %res
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}
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define <4 x i32> @maskz_shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b, i8 %mask) {
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; CHECK-LABEL: maskz_shuffle_v4i32_1234:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignd {{.*#+}} xmm0 {%k1} {z} = xmm0[1,2,3],xmm1[0]
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; CHECK-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%res = select <4 x i1> %mask.extract, <4 x i32> %shuffle, <4 x i32> zeroinitializer
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ret <4 x i32> %res
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}
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define <4 x i32> @mask_shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b, <4 x i32> %passthru, i8 %mask) {
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; CHECK-LABEL: mask_shuffle_v4i32_2345:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignd {{.*#+}} xmm2 {%k1} = xmm0[2,3],xmm1[0,1]
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; CHECK-NEXT: vmovdqa64 %xmm2, %xmm0
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; CHECK-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%res = select <4 x i1> %mask.extract, <4 x i32> %shuffle, <4 x i32> %passthru
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ret <4 x i32> %res
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}
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define <4 x i32> @maskz_shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b, i8 %mask) {
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; CHECK-LABEL: maskz_shuffle_v4i32_2345:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignd {{.*#+}} xmm0 {%k1} {z} = xmm0[2,3],xmm1[0,1]
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; CHECK-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%res = select <4 x i1> %mask.extract, <4 x i32> %shuffle, <4 x i32> zeroinitializer
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ret <4 x i32> %res
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}
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define <2 x i64> @mask_shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b, <2 x i64> %passthru, i8 %mask) {
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; CHECK-LABEL: mask_shuffle_v2i64_12:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignq {{.*#+}} xmm2 {%k1} = xmm0[1],xmm1[0]
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; CHECK-NEXT: vmovdqa64 %xmm2, %xmm0
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; CHECK-NEXT: retq
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%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <2 x i32> <i32 0, i32 1>
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%res = select <2 x i1> %mask.extract, <2 x i64> %shuffle, <2 x i64> %passthru
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ret <2 x i64> %res
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}
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define <2 x i64> @maskz_shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b, i8 %mask) {
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; CHECK-LABEL: maskz_shuffle_v2i64_12:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignq {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[0]
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; CHECK-NEXT: retq
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%shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <2 x i32> <i32 0, i32 1>
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%res = select <2 x i1> %mask.extract, <2 x i64> %shuffle, <2 x i64> zeroinitializer
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ret <2 x i64> %res
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}
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define <4 x i64> @mask_shuffle_v4i64_1234(<4 x i64> %a, <4 x i64> %b, <4 x i64> %passthru, i8 %mask) {
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; CHECK-LABEL: mask_shuffle_v4i64_1234:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignq {{.*#+}} ymm2 {%k1} = ymm0[1,2,3],ymm1[0]
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; CHECK-NEXT: vmovdqa64 %ymm2, %ymm0
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; CHECK-NEXT: retq
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%shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%res = select <4 x i1> %mask.extract, <4 x i64> %shuffle, <4 x i64> %passthru
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ret <4 x i64> %res
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}
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define <4 x i64> @maskz_shuffle_v4i64_1234(<4 x i64> %a, <4 x i64> %b, i8 %mask) {
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; CHECK-LABEL: maskz_shuffle_v4i64_1234:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignq {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3],ymm1[0]
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; CHECK-NEXT: retq
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%shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%res = select <4 x i1> %mask.extract, <4 x i64> %shuffle, <4 x i64> zeroinitializer
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ret <4 x i64> %res
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}
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define <4 x i64> @mask_shuffle_v4i64_1230(<4 x i64> %a, <4 x i64> %passthru, i8 %mask) {
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; CHECK-LABEL: mask_shuffle_v4i64_1230:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: vpermq {{.*#+}} ymm1 {%k1} = ymm0[1,2,3,0]
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; CHECK-NEXT: vmovdqa64 %ymm1, %ymm0
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; CHECK-NEXT: retq
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%shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%res = select <4 x i1> %mask.extract, <4 x i64> %shuffle, <4 x i64> %passthru
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ret <4 x i64> %res
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}
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define <4 x i64> @maskz_shuffle_v4i64_1230(<4 x i64> %a, i8 %mask) {
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; CHECK-LABEL: maskz_shuffle_v4i64_1230:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3,0]
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; CHECK-NEXT: retq
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%shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%res = select <4 x i1> %mask.extract, <4 x i64> %shuffle, <4 x i64> zeroinitializer
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ret <4 x i64> %res
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}
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define <8 x i32> @mask_shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b, <8 x i32> %passthru, i8 %mask) {
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; CHECK-LABEL: mask_shuffle_v8i32_12345678:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignd {{.*#+}} ymm2 {%k1} = ymm0[1,2,3,4,5,6,7],ymm1[0]
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; CHECK-NEXT: vmovdqa64 %ymm2, %ymm0
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; CHECK-NEXT: retq
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%shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> %passthru
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ret <8 x i32> %res
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}
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define <8 x i32> @maskz_shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b, i8 %mask) {
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; CHECK-LABEL: maskz_shuffle_v8i32_12345678:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3,4,5,6,7],ymm1[0]
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; CHECK-NEXT: retq
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%shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> zeroinitializer
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ret <8 x i32> %res
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}
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define <8 x i32> @mask_shuffle_v8i32_23456789(<8 x i32> %a, <8 x i32> %b, <8 x i32> %passthru, i8 %mask) {
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; CHECK-LABEL: mask_shuffle_v8i32_23456789:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignd {{.*#+}} ymm2 {%k1} = ymm0[2,3,4,5,6,7],ymm1[0,1]
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; CHECK-NEXT: vmovdqa64 %ymm2, %ymm0
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; CHECK-NEXT: retq
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%shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> %passthru
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ret <8 x i32> %res
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}
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define <8 x i32> @maskz_shuffle_v8i32_23456789(<8 x i32> %a, <8 x i32> %b, i8 %mask) {
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; CHECK-LABEL: maskz_shuffle_v8i32_23456789:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignd {{.*#+}} ymm0 {%k1} {z} = ymm0[2,3,4,5,6,7],ymm1[0,1]
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; CHECK-NEXT: retq
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%shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> zeroinitializer
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ret <8 x i32> %res
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}
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define <8 x i32> @mask_shuffle_v8i32_12345670(<8 x i32> %a, <8 x i32> %passthru, i8 %mask) {
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; CHECK-LABEL: mask_shuffle_v8i32_12345670:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignd {{.*#+}} ymm1 {%k1} = ymm0[1,2,3,4,5,6,7,0]
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; CHECK-NEXT: vmovdqa64 %ymm1, %ymm0
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; CHECK-NEXT: retq
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%shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> %passthru
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ret <8 x i32> %res
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}
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define <8 x i32> @maskz_shuffle_v8i32_12345670(<8 x i32> %a, i8 %mask) {
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; CHECK-LABEL: maskz_shuffle_v8i32_12345670:
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; CHECK: # BB#0:
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: valignd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3,4,5,6,7,0]
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; CHECK-NEXT: retq
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%shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> zeroinitializer
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ret <8 x i32> %res
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}
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define <8 x i32> @mask_shuffle_v8i32_23456701(<8 x i32> %a, <8 x i32> %passthru, i8 %mask) {
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; CHECK-LABEL: mask_shuffle_v8i32_23456701:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,2,3,0]
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
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; CHECK-NEXT: retq
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%shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> %passthru
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ret <8 x i32> %res
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}
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define <8 x i32> @maskz_shuffle_v8i32_23456701(<8 x i32> %a, i8 %mask) {
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; CHECK-LABEL: maskz_shuffle_v8i32_23456701:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,2,3,0]
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; CHECK-NEXT: kmovb %edi, %k1
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; CHECK-NEXT: vmovdqa32 %ymm0, %ymm0 {%k1} {z}
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; CHECK-NEXT: retq
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%shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>
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%mask.cast = bitcast i8 %mask to <8 x i1>
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%res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> zeroinitializer
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ret <8 x i32> %res
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}
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