forked from OSchip/llvm-project
118 lines
5.1 KiB
LLVM
118 lines
5.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse3 -show-mc-encoding | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2
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; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX
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define <2 x double> @test_x86_sse3_addsub_pd(<2 x double> %a0, <2 x double> %a1) {
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; SSE-LABEL: test_x86_sse3_addsub_pd:
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; SSE: ## BB#0:
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; SSE-NEXT: addsubpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd0,0xc1]
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; SSE-NEXT: retl ## encoding: [0xc3]
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;
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; VCHECK-LABEL: test_x86_sse3_addsub_pd:
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; VCHECK: ## BB#0:
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; VCHECK-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd0,0xc1]
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; VCHECK-NEXT: retl ## encoding: [0xc3]
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%res = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwind readnone
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define <4 x float> @test_x86_sse3_addsub_ps(<4 x float> %a0, <4 x float> %a1) {
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; SSE-LABEL: test_x86_sse3_addsub_ps:
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; SSE: ## BB#0:
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; SSE-NEXT: addsubps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0xd0,0xc1]
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; SSE-NEXT: retl ## encoding: [0xc3]
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;
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; VCHECK-LABEL: test_x86_sse3_addsub_ps:
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; VCHECK: ## BB#0:
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; VCHECK-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xd0,0xc1]
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; VCHECK-NEXT: retl ## encoding: [0xc3]
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%res = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind readnone
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define <2 x double> @test_x86_sse3_hadd_pd(<2 x double> %a0, <2 x double> %a1) {
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; SSE-LABEL: test_x86_sse3_hadd_pd:
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; SSE: ## BB#0:
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; SSE-NEXT: haddpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x7c,0xc1]
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; SSE-NEXT: retl ## encoding: [0xc3]
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;
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; VCHECK-LABEL: test_x86_sse3_hadd_pd:
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; VCHECK: ## BB#0:
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; VCHECK-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x7c,0xc1]
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; VCHECK-NEXT: retl ## encoding: [0xc3]
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%res = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind readnone
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define <4 x float> @test_x86_sse3_hadd_ps(<4 x float> %a0, <4 x float> %a1) {
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; SSE-LABEL: test_x86_sse3_hadd_ps:
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; SSE: ## BB#0:
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; SSE-NEXT: haddps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x7c,0xc1]
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; SSE-NEXT: retl ## encoding: [0xc3]
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;
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; VCHECK-LABEL: test_x86_sse3_hadd_ps:
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; VCHECK: ## BB#0:
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; VCHECK-NEXT: vhaddps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x7c,0xc1]
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; VCHECK-NEXT: retl ## encoding: [0xc3]
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%res = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind readnone
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define <2 x double> @test_x86_sse3_hsub_pd(<2 x double> %a0, <2 x double> %a1) {
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; SSE-LABEL: test_x86_sse3_hsub_pd:
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; SSE: ## BB#0:
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; SSE-NEXT: hsubpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x7d,0xc1]
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; SSE-NEXT: retl ## encoding: [0xc3]
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;
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; VCHECK-LABEL: test_x86_sse3_hsub_pd:
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; VCHECK: ## BB#0:
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; VCHECK-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x7d,0xc1]
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; VCHECK-NEXT: retl ## encoding: [0xc3]
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%res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind readnone
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define <4 x float> @test_x86_sse3_hsub_ps(<4 x float> %a0, <4 x float> %a1) {
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; SSE-LABEL: test_x86_sse3_hsub_ps:
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; SSE: ## BB#0:
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; SSE-NEXT: hsubps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x7d,0xc1]
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; SSE-NEXT: retl ## encoding: [0xc3]
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;
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; VCHECK-LABEL: test_x86_sse3_hsub_ps:
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; VCHECK: ## BB#0:
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; VCHECK-NEXT: vhsubps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x7d,0xc1]
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; VCHECK-NEXT: retl ## encoding: [0xc3]
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%res = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind readnone
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define <16 x i8> @test_x86_sse3_ldu_dq(i8* %a0) {
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; SSE-LABEL: test_x86_sse3_ldu_dq:
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; SSE: ## BB#0:
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; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
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; SSE-NEXT: lddqu (%eax), %xmm0 ## encoding: [0xf2,0x0f,0xf0,0x00]
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; SSE-NEXT: retl ## encoding: [0xc3]
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;
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; VCHECK-LABEL: test_x86_sse3_ldu_dq:
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; VCHECK: ## BB#0:
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; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
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; VCHECK-NEXT: vlddqu (%eax), %xmm0 ## encoding: [0xc5,0xfb,0xf0,0x00]
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; VCHECK-NEXT: retl ## encoding: [0xc3]
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%res = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %a0) ; <<16 x i8>> [#uses=1]
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ret <16 x i8> %res
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}
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declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly
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