forked from OSchip/llvm-project
25 lines
871 B
LLVM
25 lines
871 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s
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; Ensure PSRAD is generated as the condition is consumed by both PADD and
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; BLENDVPS. PAND requires all bits setting properly.
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define <4 x i32> @foo(<4 x i32>* %p, <4 x i1> %cond, <4 x i32> %v1, <4 x i32> %v2, <4 x i32> %v3) {
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; CHECK-LABEL: foo:
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; CHECK: # BB#0:
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; CHECK-NEXT: pslld $31, %xmm0
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; CHECK-NEXT: psrad $31, %xmm0
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; CHECK-NEXT: blendvps %xmm1, %xmm2
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; CHECK-NEXT: paddd %xmm0, %xmm1
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; CHECK-NEXT: movaps %xmm2, (%rdi)
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: retq
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;
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%sext_cond = sext <4 x i1> %cond to <4 x i32>
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%t1 = add <4 x i32> %v1, %sext_cond
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%t2 = select <4 x i1> %cond, <4 x i32> %v1, <4 x i32> %v2
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store <4 x i32> %t2, <4 x i32>* %p
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ret <4 x i32> %t1
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}
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